Princeton computer architecture has the ability to either read instructions or read and write data. Harvard computer architecture, on the other hand, is able to do both simultaneously.
Princeton, or Von Neumann, architecture is limited by the fact that both coding and instruction procedures utilize the same bus system. Although experts agree that the Princeton's biggest advantage lies in its simplicity, according to Princeton University, Harvard's architecture results in a quicker execution time. Its speed is due to parallelism, or the ability to fetch new instructions during the execution of current instructions.
Harvard uses two distinct address spaces for instructions and data, so that both units of information are registered correctly. A pipeline strategy fetches the instruction for execution and decodes them, then takes data from data memory using the decoded instructions. Since Princeton architecture requires two cycles to do both tasks, pipelining is not applicable. Most experts agree that Princeton architecture is more suitable for developing software, such as real-time operating systems.
The original development of both architectures stemmed from a U.S. government-sponsored contest during the 1940s that dealt with military applications. Princeton initially won because its simplistic nature appealed to the government's cautiousness. By the 1970s, however, many microcontroller manufacturers preferred Harvard's architecture, due to the increasing complexity of their technology.