By today's standards the LVDC was extremely slow, with a 2.048 MHz clock cycle, add operations taking 82 microseconds (vs a fraction of a nanosecond on a Pentium 4) and memory holding a maximum of 32,768 28-bit words in memory modules of 4096 words each, each equivalent to less than sixteen kilobytes. However, for the 1960s it was a sophisticated system, and easily capable of flying a three-thousand ton rocket into a hundred mile high orbit.
The computer processed 26-bit data (25 bits of magnitude and one sign bit), with two extra parity bits for error detection, and instructions were 13 bits in size with one parity bit. This meant that two instructions could fit in one data word, making the limited memory size less constricting for software. Main memory was random access magnetic core, with ultrasonic delay lines for temporary storage.
For reliability the LVDC used triple-redundant logic and a voting system. The computer included three identical logic systems. Each logic system was split into a seven stage pipeline. At each stage in the pipeline, a voting system would take a majority vote on the results, with the most popular result being passed on to the next stage in all pipelines. This meant that, for each of the seven stages, one module in any one of the three pipelines could fail, and the LVDC would still produce the correct results. The result was an estimated reliability of 99.6% over 250 hours of operation, which was far more than the few hours required for an Apollo mission.
With four memory modules, giving a total capacity of 16384 words, the computer weighed 72.5 pounds (approx 35 kilograms), was 29.5"x12.5"x10.5" in size (74x32x27 cm) and consumed 137 watts of power, the latter at least beating a modern PC.
LVDC instruction words were split into a 4-bit operand field and a 9-bit address field. This left it with sixteen possible operand values when there were eighteen different instructions: consequently, three of the instructions used the same operand value, and used two bits of the address value to determine which instruction was executed.
The eighteen possible LVDC instructions were:
|Transfer execution to a different part of the program. Unlike a modern 'jump' instruction the operand address did not actually specify the address to jump to, but pointed to a 26-bit 'HOP constant' which specified the address.|
|Multiply the contents of the memory location specified in the operand address by the contents of the accumulator register. This instruction took four instruction cycles to complete, but didn't stall program execution, so other instructions could execute before it finished.|
|Subtract the contents of the memory location specified in the operand address from the accumulator register.|
|Divide the contents of the memory location specified in the operand address into the accumulator. This instruction took eight instruction cycles to complete, but didn't stall program execution.|
|Transfers instruction execution to the operand address specified if the accumulator contents are not zero.|
|Multiply the contents of the memory location specified in the operand address by the contents of the accumulator register. Unlike MPY, this instruction does halt execution until the multiplication is complete.|
|Logically AND the contents of the accumulator with the contents of the memory location specified in the operand address.|
|Add the contents of the memory location specified in the operand address to the accumulator register.|
|Transfer execution to the memory location specified in the operand address.|
|Logically XOR the contents of the accumulator with the contents of the memory location specified in the operand address.|
|Process input or output: communicate with external hardware.|
|Store the contents of the accumulator register in the memory location specified in the operand address.|
|Transfer execution to the operand address specified if the accumulator contents are negative.|
|Contents of the accumulator are subtracted from the contents of the memory location specified in the operand address, and the result left in the accumulator.|
|Contents of accumulator are shifted by up to two bits, based on a value in the operand address. This instruction can also clear the accumulator if the operand address bits are zero.|
|Change data sector.|
|Transfer execution to one of eight addresses dependent on the operand address, which also specifies modifications to the operand address of the next instruction before it is executed.|
Unlike the Apollo Guidance Computer, the software which ran on the LVDC seems to have vanished. While the hardware would be fairly simple to emulate, the only remaining copies of the software are probably in the core memory of the Instrument Unit LVDCs of the remaining Saturn V rockets on display at NASA sites.
The LVDC could also respond to a number of interrupts triggered by external events.
For a Saturn IB these interrupts were:
|LVDC Data Word Bit||Function|
|Internal to LVDC|
|Simultaneous Memory Error|
|Command Decoder Interrupt|
|Guidance Reference Release|
|Manual Initiation of S-IVB Engine Cutoff|
|S-IB Outboard Engines Cutoff|
|S-IVB Engine Out|
|S-IB Low Fuel Level Sensors Dry|
For a Saturn V these interrupts were:
|LVDC Data Word Bit||Function|
|1||Minor Loop Interrupt|
|2||Switch Selector Interrupt|
|3||Computer Interface Unit Interrupt|
|4||Temporary Loss Of Control|
|5||Command Receiver Interrupt|
|6||Guidance Reference Release|
|7||S-II Propellant Depletion/Engine Cutoff|
|8||S-IC Propellant Depletion/Engine Cutoff|
|9||S-IVB Engine Out|
|10||Program Recycle (RCA-110A Interrupt)|
|11||S-IC Inboard Engine Out|
|12||Command LVDA/RCA-110A Interrupt|
The LVDC was approximately 30 inches wide, 12.5 inches high, and 10.5 inches deep and weighed 80 pounds. The chassis was made of magnesium-lithium alloy LA 141, chosen for its high stiffness, low weight, and good vibration damping characteristics. The chassis was divided into a 3 x 5 matrix of cells separated by walls through which coolant was circulated to remove the 138 Watts of power generated by the computer. Slots in the cell walls held “pages” of electronics.
A page consisted of two 2.5 x 3-inch boards back to back and a magnesium-lithium frame to conduct heat to the chassis. The 12-layer boards contained signal, power, and ground layers and connections between layers were made by plated-through holes.
Up to 35 alumina squares 0.3 x 0.3 x 0.070 inch could be reflow soldered to a board. These alumina squares had conductors silk screened to the top side and resistors silk-screened to the bottom side. Semiconductor chips 0.025 x 0.025 inch, each containing either one transistor or two diodes, were reflow soldered to the top side. Copper balls were used for contacts between the chips and the conductive patterns.
The hierarchy of the electronic structure is shown in the following table.
|1||Transistor, diode||0.025 x 0.025 inch silicon||-|
|2||Up to 14 transistors, diodes and resistors||0.3 x 0.3 x 0.07 inch alumina||ULD (Unit Logic Device)|
|3||Up to 35 ULDs||2.5 x 3 inch printed circuit board||MIB (Multilayer Interconnection Board)|
|4||Two MIBs||Magnesium-lithium frame||Page|