RISC OS is an operating system originally created by British manufacturer Acorn Computers for their ARM based computers ranging from Archimedes to Risc PC, replacing Arthur which was shipped on the first models.
The operating system takes its name from the RISC architecture used on supported systems.
Applications bundled with RISC OS vary slightly between versions, but usually include the following core apps:
RISC OS was designed in Cambridge, England by Acorn for the 32-bit ARM-based Acorn Archimedes and released in its first version in 1987 as the Arthur operating system. Arthur was heavily based on the operating system written for the BBC Master series of computers, MOS, and was ported very quickly when it became clear that a more advanced operating system research project would not be ready in time for the Archimedes.
RISC OS was a rapid development of Arthur 1.2 after the failure of the ARX project. The first release was to be called Arthur 2, but was renamed to RISC OS 2, and was first sold as RISC OS 2.00 in April 1989. The operating system implements co-operative multitasking with some limitations but is not multithreaded. It uses the ADFS filesystem for both floppy and hard disc access. It initially ran from a 512 KiB ROM module. The WIMP interface offers all the standard features and fixes many of the bugs that had hindered Arthur. It lacks virtual memory and extensive memory protection (applications are protected from each other, but many functions have to be implemented as 'modules' which have full access to the memory). At the time of release, the main advantage of the OS was its ROM; it booted very quickly and while it was easy to crash it was impossible to permanently break the OS from software. Its high performance was due to much of the system being written in ARM assembly language. The OS is organised as a relatively small kernel which defines a standard software interface to which extension modules are required to conform. Much of the system's functionality is implemented in modules coded in the ROM, though these can be supplanted by more evolved versions loaded into RAM. Among the kernel facilities are a general mechanism, named the callback handler, which allows a supervisor module to perform process multiplexing. This facility is used by a module forming part of the standard editor program to provide a terminal emulator window for console applications. The same approach made it possible for advanced users to implement modules giving RISC OS the ability to do pre-emptive multitasking.
One unusual and innovative feature of the operating system at the time of its release was its support for high-quality, hinted and anti-aliased outline font rendering, a feature that only became widespread in other operating systems much later.
A slightly updated version RISC OS 2.01 was released later to support the ARM3 processor that was shipped with the Acorn Archimedes A540 and Acorn R225/R260.
RISC OS 3.00 was released with the very earliest version of the A5000 in 1991; it is almost four times the size of RISC OS 2 and runs from a 2 MiB ROM. It improves multitasking and also places some of the more popular base applications in the ROM. RISC OS 3.00 had several bugs and was replaced by RISC OS 3.1 a few months later; the upgraded ROMs were supplied for the cost of postage only.
RISC OS 3.1 was released later and sold built-in to the A3010, A3020, A4000, A4 and later A5000 models. It was also made available as replacement ROMs for the A5000 and earlier Archimedes machines (this is the last RISC OS version suitable for those machines). Three variants were released - RISC OS 3.10 the base version, RISC OS 3.11 which included a slight update that fixes some serial port issues and RISC OS 3.19 which was a German translation.
RISC OS 3.50 was sold from 1994 with the first Risc PCs. Due to the very different hardware architecture of the Risc PC, including an ARM 6 processor, 16 and 24bit colour and a different IO chip (IOMD), RISC OS 3.50 was not made available for the older Archimedes and A Series ARM 2 and 3 machines. RISC OS 3.5 was somewhat shoehorned into the 2 MiB footprint, and moved the ROM applications of RISC OS 3.1 onto the hard drive; this proved so unpopular that they were later moved back into ROM.
RISC OS 3.60 followed in 1995. The OS features much better hard disk access and its networking was enhanced to include TCP/IP as standard in addition to Acorn's existing proprietary Econet system. The hardware support was also improved; Risc PCs could now use ARM 7 processors. Acorn's A7000 machine with its ARM 7500 processor was also supported. RISC OS 3.6 was twice the size of RISC OS 3.5, shipping on 4 MiB in two ROM chips.
RISC OS 3.70 was released in 1996. The primary changes in the OS was support for the StrongARM processor that was made available as an upgrade for the Risc PC. This required extensive code changes due to StrongARM's split data and instruction cache (Harvard architecture) and 32-bit interrupt modes.
RISC OS 3.71 is a small update released to support the hardware in the Acorn A7000+ with its ARM 7500FE processor. The FE offered hardware support for floating point mathematics, which until then was usually emulated in one of the RISC OS Software modules).
Acorn officially halted work in all areas except set-top boxes in late 1998 and the company was renamed Element 14 (the 14th element of the periodic table being silicon) with a new goal to become purely a Silicon design business (like the previous very successful spin off of ARM from Acorn in 1990). RISC OS development was halted during the development of OS 4.0 for the RiscPC 2 ("Phoebe 2100"), whose completion was also cancelled. A beta version, OS 3.8 ("Ursula") for the original RiscPC, had previously been released to developers. The project code names of Phoebe (for the hardware), Ursula (for the software) and Chandler (for the graphics processor chip) were taken from the names of characters in the TV series Friends (Phoebe and Ursula were twin sisters in the series).
This led to a number of rescue efforts to try and keep the Acorn desktop computer business alive. Acorn held discussions with many interested parties, and eventually agreed to exclusively licence RISC OS to RISCOS Ltd, which was formed from a consortium of dealers, developers and end-users. There were also a number of projects to bring the advantages of the RISC Operating System to other platforms by the creation of the ROX Desktop to provide a RISC OS-like interface on Unix and Linux systems. Two similar projects, Impulse and Eidos's Phoenix, have both stalled.
In 1999 a new company called RISCOS Ltd was founded. They licensed the rights to RISC OS from Element 14 (and eventually from the new owner, Pace Micro Technology) and continued the development of OS 3.8, releasing it as RISC OS 4 in July 1999. According to the company, over 6,400 copies of RISC OS 4.02 were sold up until production was ceased in mid 2005 .
In 2002 the company launched RISC OS Select, a subscription scheme allowing users access to the latest OS updates in between major releases. These upgrades are released as soft-loadable patches, separate to the Flash ROM where the main OS is stored, and are loaded at boot time. The scheme was devised to accelerate RISCOS Ltd's development cycle by producing extra income in between major releases. It has also allowed the company to subsidise the retail price of ROM releases, which are generally a culmination of the last few Select upgrades with a few extra minor changes.
In April 2004, RISCOS Ltd released the ROM based version 4.39, being dubbed RISC OS Adjust. (The name was a play on the RISC OS GUI convention of calling the three mouse buttons 'Select', 'Menu' and 'Adjust'.) RISCOS Ltd sold its 500th Adjust ROM in early 2006 .
In 2004, RISCOS Ltd privately began work on a 32-bit version of RISC OS Adjust (Adjust 32), which is compatible with current ARM processors and designed for both embedded and desktop forms. The first machine to make use of the updated OS is the Advantage6 A9home (Photo of Portable Desktop Version). It was released in May 2006 after a 12 month Beta testing process, although the current build of Adjust 32, namely RISC OS 4.42, is not yet feature complete. Both 26- and 32-bit builds of new RISC OS 4 releases can now be compiled from the same source code, but will have to be modified to run on each individual machine supported, as the OS has no HAL at present. Instead it has a hardware-abstracted kernel, which allows specific code to be substituted for each platform supported.
RISC OS 4 is also available as an emulator for Windows systems. The emulator is called Virtual Acorn and is sold by 3QD Developments The latest version is Virtual RPC-Adjust: RO 4.39. An Apple Mac version suitable for use with new Intel based Macs and older G5 Macs running Mac OS X is now available and in tests on the latest Apple hardware is shown to be running around 3 times faster than a real Risc PC for many OS based operations and up to 10 times faster on hardware based operations, such as copying files from CD to harddrive.
RISC OS 5 is a separate evolution by Castle Technology Ltd based upon work done by Pace for their NCOS based set top boxes. RISC OS 5 was written to support Castle's Iyonix PC Acorn-compatible, which runs on the Intel XScale ARM processor. Although a wealth of software has now been updated, a few older applications can only be run on RISC OS 5 via an emulator called aemulor, since the ARMv5 XScale processor does not support 26-bit addressing modes. Likewise, RISC OS 5 itself had to be ported to run properly on the new CPU, and abstraction of the graphics and other hardware interfaces created, to allow it, for example, to use standard graphics cards, instead of Acorn's own VIDC chip.
In July 2003, Castle Technology Ltd bought the head licence for RISC OS from Pace Micro. RISCOS Ltd and Castle continued maintaining separate development branches of the RISC OS operating system for some time, but as a result of a lengthy dispute over licensing during 2004 the two companies agreed to merge the two competing streams. Whether a unified version will be released is yet to be seen, however, as RISCOS Ltd have continued development of their stream of the OS in preparation to launch Version 6.
In October 2006, Castle Technology Ltd announced a plan to release elements of RISC OS 5 under a unique source sharing license. The Shared Source Initiative (SSI) is a joint venture between Castle and RISC OS Open Limited (ROOL), a newly formed software development company, which aims to accelerate development and encourage uptake of the OS. Under the custom dual license, released source will be freely available and may be modified and redistributed without royalty for non-commercial use, while commercial usage will incur a per-unit license fee to Castle. The full license has not yet been released.
The SSI will initially make phased releases of the OS, starting with the following components:
In a Drobe forum, ROOL director Andrew Hodgkinson said the SSI would release as many components as possible, but it was too early to say how much of the OS that might be.
He said: "The ultimate goal would be to have a complete OS there - perhaps, for example, you could build yourself an Iyonix ROM. But that's putting the cart before the horse. We cannot promise being able to reach such a position at this stage, so we're not doing so."
ROOL will maintain the shared source tree and build an international developer community on a non-profit basis to support and encourage development. Both ROOL and Castle intend to provide RISC OS consultancy to clients requiring embedded ARM solutions, already a major market for the OS.
At this stage it is unclear whether RISC OS Ltd, developer of RISC OS 4, will co-operate with the SSI.
The company said on their website: "We await the full details of the licensing terms and conditions that will be applicable to RISC OS 5 source code. When these are known we shall be able to review the situation. However the current expectation is that there are very few features that are present in RISC OS 5 that are missing in RISC OS Six, that have a very high priority for inclusion in future releases of RISC OS 6."
RISCOS Ltd Managing Director - Paul Middleton told Drobe News that the company would not be open sourcing its OS code in the same way.
He said: "It is probably worth pointing out that the 'open sourcing' of RISC OS is going to solely cover RISC OS 5 versions. We do not intend to 'open source' RISC OS 4 versions as some people seem to have assumed.
"I would point out though that we have always been happy to work with developers who require source level access to RISC OS, in the same way that Acorn made sources available for particular projects. The difference between us and ROOL is that we do require any changes made to be fed back to us, as we only want one version of RISC OS 4 to be available."
Shortly after Castle announced the SSI, RISCOS Ltd announced RISC OS Six, the next generation of their stream of the operating system. Significant portability, stability and internal structure improvements, including full 26/32 bit neutrality, have laid the foundations for the company's future releases, all of which will be based on Version 6.
RISC OS Six is now highly modularised, with legacy and hardware specific features abstracted, and other code separated for easier future maintenance and development. Teletext support, device interrupt handler, software-based graphics operations, the real-time clock, the mouse pointer, CMOS RAM support, and hardware timer support have been abstracted out of the kernel and into their own separate modules. Legacy components, like the VIDC driver, and obsolete functionality for the BBC Micro have been abstracted too. AIF and transient utility executable checking has been introduced also to protect against rogue software, while graphics acceleration modules are provided for the SM501 graphics chip in the A9home and for ViewFinder AGP podule cards.
A beta-version of RISC OS 6, Preview 1, was available for free download by subscribers to the Select scheme, both present and those whose subscription was renewed after 30th May 2004 - but has since lapsed.
Select Edition 4 is the first product to be based on RISC OS Six. Originally slated for release around mid-2005, it had been subject to delays due to the company's commitment to support the porting of RISC OS to a 32bit neutral environment which became Adjust 32 on the A9home.
Select 4 includes new user functionality RISCOS Ltd released Select 4 issue 2 to subscribers on 30th April 2007, this version of RISC OS is numbered 6.06. Select 4 issue 3 was released in September of the same year and provided updates to 6.06 including initial support for filer short cuts.
On 26th April 2008 RISCOS Ltd released Select 4 issue 4 with many new features
Select 4 releases are initially compatible with only Acorn Risc PC and A7000 machines. RiscStation R7500, MicroDigital Omega and Mico computers will not officially be supported, as the company does not have test machines available and requires proprietary software code to which they don't have the rights. Lack of detailed technical information about the MicroDigital Omega has also been talked about as being another reason why support of that hardware is difficult. Subsequent versions of Select 4 will also be compatible with the A9home.
An Iyonix-compatible version of RISC OS 6 is described as a possibility - From the RISC OS 6 FAQ : "Some people have assumed that because we have not made any definite announcements with respect to Select 4 on the Iyonix, that we are not interested in doing the work. The facts are however that our resources are limited, and priority has been given to working with partners who actively want RISC OS Select features on their products."