Extended display identification data (EDID) is a data structure provided by a computer display to describe its capabilities to a graphics card. It is what enables a modern personal computer to know what kind of monitor is connected. EDID is defined by a standard published by the Video Electronics Standards Association (VESA). The EDID includes manufacturer name, product type, phosphor or filter type, timings supported by the display, display size, luminance data and (for digital displays only) pixel mapping data.
EDID structure 1.0 was defined in 1994; version 1.1 followed in 1996, then 1.2, and 1.3 in 2000. All these define upwards compatible 128 byte structures. EDID structure 2.0 defines a new 256-byte structure.
The channel for transmitting the EDID from the display to the graphics card is usually the I²C bus. The combination of EDID and I²C is called the Display Data Channel version 2, or DDC2. The 2 distinguishes it from VESA's original DDC, which used a different serial format.
Before DDC and EDID were defined, there was no standard way for a graphics card to know what kind of display device it was connected to. Some VGA connectors in personal computers provided a basic form of identification by connecting one, two or three pins to ground, but this coding was not standardized.
The EDID is often stored in the monitor in a memory device called a serial PROM (programmable read-only memory) or EEPROM (electrically erasable PROM) that is compatible with the I²C bus.
Many software packages can read and display the EDID information, such as read-edid and Powerstrip for Microsoft Windows and XFree86 (which will output the EDID to the log if verbose logging is on (startx -- -logverbose 6)) for Linux and BSD unix. Mac OS X natively reads EDID information (see /var/log/system.log or hold down Cmd-V on startup) and programs such as SwitchResX or DisplayConfigX can display the information as well as use it to define custom resolutions.
Enhanced EDID is based on the EDID version 1.3, but offers support of extensions, which enable EDID 2.0 to be supported as an extension. Data fields for preferred timing, range limits, monitor name are required in E-EDID. E-EDID also supports dual GTF, standard timings aspect ratio change.
With the use of extensions, E-EDID string can be lengthened up to 32KiBytes.
Many Wide XGA panels do not advertise their native resolution in the standard timing descriptors, instead offering only a resolution of 1280×768. Some panels advertise a resolution only slightly smaller than the native, such as 1360×765. For these panels to be able to show a pixel perfect image, the EDID data must be ignored by the display driver or the driver must correctly interpret the DTD and be able to resolve resolutions whose size is not divisible by 8. Special programs are available to override the standard timing descriptors from EDID data; PowerStrip for Microsoft Windows and SwitchResX for Mac OS X.
Byte sequence 00–07: Header information 08–17: Complete serial number08–09: Manufacturer ID10–11: Product ID Code (little-endian)12–15: Serial Number (little-endian)16: Week of Manufacture17: Year of Manufacture. Add 1990 to the value for actual year.18: EDID Version Number 19: EDID Revision Number 20-24: Basic Display Parameters20: VIDEO INPUT DEFINITIONbit 7: 0=analog, 1=digitalif bit 7 is digital:bit 0: 1=DFP 1.x compatibleif bit 7 is analog:bit 6-5: video level00=0.7, 0.3, 01=0.714, 0.286, 10=1, .4 11=0.7, 0bit 4: blank-to-black setupbit 3: separate syncsbit 2: composite syncbit 1: sync on greenbit 0: serration vsync21: Maximum Horizontal Image Size (in centimeters).22: Maximum Vertical Image Size (in centimetres).23: Display Gamma. Divide by 100, then add 1 for actual value.24: Power Management and Supported Feature(s):bit 7: standbybit 6: suspendbit 5: active-off/low powerbit 4-3: display type.00=monochrome, 01=RGB colour, 10=non RGB multicolour, 11=undefinedbit 2: standard colour spacebit 1: preferred timing modebit 0: default GTF supported25-34: CHROMA INFO25: low significant bits for Red X (bit 7-6), Red Y (bit 5-4), Green X (bit 3-2), Green Y (bit 1-0).26: low significant bits for Blue X (bit 7-6), Blue Y (bit 5-4), White X (bit 3-2), White Y (bit 1-0).27–34: high significant bits for Red X, Red Y, Green X, Green Y, Blue X, Blue Y, White X, White Y.To decode actual value, rearrange bits as follows:High significant bits 7-0 for (channel), low significant bits for (channel).Actual value is between 0.000 and 0.999, but encoded value is between 000h and 3FFh.35: ESTABLISHED TIMING Ibit 7-0: 720×400@70 Hz, 720×400@88 Hz, 640×480@60 Hz, 640×480@67 Hz,640×480@72 Hz, 640×480@75 Hz, 800×600@56 Hz, 800×600@60 Hz36: ESTABLISHED TIMING IIbit 7-0: 800×600@72 Hz, 800×600@75 Hz, 832×624@75 Hz, 1024×768@87 Hz (Interlaced),1024×768@60 Hz, 1024×768@70 Hz, 1024×768@75 Hz, 1280×1024@75 Hz37: Manufacturer's Reserved Timing00h for nonebit 7: 1152x870 @ 75 Hz (Mac II, Apple)38–53: Standard Timing Identification. 2 bytes for each record.First byteHorizontal resolution. Multiply by 8, then add 248 for actual value.Second bytebit 7-6: Aspect ratio. Actual vertical resolution depends on horizontal resolution.00=16:10, 01=4:3, 10=5:4, 11=16:9bit 5-0: Vertical frequency. Adds 60 to get actual value.54–71: Descriptor Block 1
54–55: Pixel Clock (in 10 kHz) or 0If Pixel Clock is non null:56: Horizontal Active (in pixels)57: Horizontal Blanking (in pixels)58: Horizontal Active high (4 upper bits)Horizontal Blanking high (4 lower bits)59: Vertical Active (in pixels)60: Vertical Blanking (in vertical pixels/lines)61: high significant bits for Vertical Active (4 upper bits)high significant bits for Vertical Blanking (4 lower bits)62: Horizontal Sync Offset (in pixels)63: Horizontal Sync Pulse Width (in pixels)64: Vertical Sync Offset (in lines) (4 upper bits)Vertical Sync Pulse Width (in lines) (4 lower bits)65: high significant bits for Horizontal Sync Offset (bit 7-6)high significant bits for Horizontal Sync Pulse Width (bit 5-4)high significant bits for Vertical Sync Offset (bit 3-2)high significant bits for Vertical Sync Pulse Width (bit 1-0)66: Horizontal Image Size (in mm)67: Vertical Image Size (in mm)68: high significant bits for Horizontal Image Size (4 upper bits)high significant bits for Vertical Image Size (4 lower bits)69: Horizontal Border70: Vertical Border71: Interlaced or not (bit 7)Stereo or not (bit 6-5) ("00" means not)Separate Sync or not (bit 4-3)Vertical Sync positive or not (bit 2)Horizontal Sync positive or not (bit 1)Stereo Mode (bit 0) (unused if 6-5 are 00)If Pixel Clock is null:56: 057: Block typeFFh=Monitor Serial Number, FEh=ASCII string, FDh=Monitor Range Limits, FCh=Monitor name,FBh=Colour Point Data, FAh, Standard Timing Data, F9h=Currently undefined, F8h=defined by manufacturer58: Unknown59–71: Descriptor block contents.If block type is FFh, FEh, or FCh, the entire area is a text string.If block type is FDh:59–63:Min Vertical frequency, Max Vertical frequency,Min Horizontal frequency (in kHz), Max Horizontal frequency (in kHz), pixel clock (in MHz (multiply by 10 for actual value))64–65: Secondary GTF toggleIf encoded value is 000A, bytes 59-63 are used. If encoded value is 0200, bytes 67–71 are used.66: Start horizontal frequency (in kHz). Multiply by 2 for actual value.67: C. Divide by 2 for actual value.68-69: M (little endian).70: K71: J. Divide by 2 for actual value.If block type is FBh:59: W Index 0. If set to 0, bytes 60-63 are not used. If set to 1, 61–63 are assigned to white point index #164: W Index 1. If set to 0, bytes 65-68 are not used. If set to 2, 65–68 are assigned to white point index #2White point index structure:First bytebit 3-2: low significant bits for White X (bit 3-2), White Y (bit 1-0)Second to third byte: high significant bits for White X, White Y.Fourth byte: Gamma. Divide by 100, then add 1 for actual value.To decode White X and White Y, see bytes 25-34.If block type is FAh:59–70: Standard Timing Identification. 2 bytes for each record.For structure details, see bytes 38-53.72–89: Descriptor Block 2 90–107: Descriptor Block 3 108–125: Descriptor Block 4 126: Extension EDID Block(s). In EDID 1.1, it is ignored, and should be set to 0. In EDID 1.3, this is the number of
extension blocks which follow the first.127: Checksum.
For example, here is a summary of the data reported by an Envision EN-775e monitor:
Monitor Name EPI EnVision EN-775eMonitor ID EPID775Model EN-775eManufacture Date Week 26 / 2002Serial Number 1226764172Max. Visible Display Size 32 cm × 24 cm (15.7 in)Picture Aspect Ratio 4:3Horizontal Frequency 30–72 kHzVertical Frequency 50–160 HzMaximum Resolution 1280×1024Gamma 2.20DPMS Mode Support Active-OffSupported Video Modes:
640×480 140 Hz800×600 110 Hz1024×768 85 Hz1152×864 75 Hz1280×1024 65 HzMonitor Manufacturer:
Company Name Envision, Inc.
The CEA EDID Timing Extension was first introduced in EIA/CEA-861, and has since been updated several times, most notably with the -861B revision (which was version 3 of the extension, adding Short Video Descriptors and advanced audio capability/configuration information) and -861D (which is the most recent and contains updates to the audio segments).
Version 1 (as defined in -861) allowed the specification of video timings only through the used of 18-byte Detailed Timing Descriptors (as detailed in EDID 1.1 data format above). In all cases, the "preferred" timing should be the first DTD listed in a CEA EDID Timing Extension.
Version 2 (as defined in -861A) added the capability to designate a number of DTDs as "native" and also included some "basic discovery" functionality for whether the display device contains support for "basic audio", YCbCr pixel formats, and underscan.
Per Version 3 (from the -861B spec), there are two different ways to specify the timings of available DTV formats: via the use of 18-byte Detailed Timing Descriptors as in Version 1 & 2, and via the use of the Short Video Descriptor (see below).
Included in Version 3 are four new optional types of data blocks: Video Data Blocks (containing the aforementioned Short Video Descriptors), Audio Data Blocks (containing Short Audio Descriptors), Speaker Allocation Data Blocks (containing information about the speaker configuration of the display device), and Vendor Specific Data Blocks (which can contain information specific to a given vendor's use).
Byte sequence 00: Extension tag (which kind of extension block this is); 02h for CEA EDID 01: Revision number (Version number); 03h for Version 3 02: Byte number "d" within this block where the 18-byte DTDs begin. If no non-DTD data is present in this extension block, the valueshould be set to 04h (the byte after next). If set to 00h, there are no DTDs present in this block and no non-DTD data.03: Number of DTDs present, other Version 2+ informationbit 7: 1 if display supports underscan, 0 if notbit 6: 1 if display supports basic audio, 0 if notbit 5: 1 if display supports YCbCr 4:4:4, 0 if notbit 4: 1 if display supports YCbCr 4:2:2, 0 if notbit 3..0: total number of native formats in the DTDs included in this block04: Start of Data Block Collection. If byte 02 is set to 04h, this is where the DTD collection begins. If byte 02 is set to anothervalue, byte 04 is where the Data Block Collection begins, and the DTD collection follows immediately thereafter.The Data Block Collection contains one or more data blocks detailing video, audio, and speaker placement information about the display. The blocks can be placed in any order, and the initial byte of each block defines both its type and its length:
bit 7..5: Block Type Tag (1 is audio, 2 is video, 3 is vendor specific, 4 is speaker allocation, all other values Reserved)bit 4..0: Total number of bytes in this block following this byteOnce one data block has ended, the next byte is assumed to be the beginning of the next data block. This is the case until the byte(designated in Byte 02, above) where the DTDs are known to begin.Any Audio Data Block contains one or more 3-byte Short Audio Descriptors (SADs). Each SAD details audio format, channel number, andbitrate/resolution capabilities of the display as follows:SAD Byte 1 (format and number of channels):bit 7: Reserved (0)bit 6..3: Audio format code1 = Linear Pulse Code Modulation (LPCM)2 = AC-33 = MPEG1 (Layers 1 and 2)4 = MP35 = MPEG26 = AAC7 = DTS8 = ATRAC0, 15: Reserved9 = One-bit audio aka SACD10 = DD+11 = DTS-HD12 = MLP/Dolby TrueHD13 = DST Audio14 = Microsoft WMA Probit 2..0: number of channels minus 1 (i.e. 000 = 1 channel; 001 = 2 channels; 111 = 8 channels)SAD Byte 2 (sampling frequencies supported):bit 7: Reserved (0)bit 6: 192kHzbit 5: 176kHzbit 4: 96kHzbit 3: 88kHzbit 2: 48kHzbit 1: 44kHzbit 0: 32kHzSAD Byte 3 (bitrate):For LPCM, bits 7:3 are reserved and the remaining bits define bit depthbit 2: 24 bitbit 1: 20 bitbit 0: 16 bitFor all other sound formats, bits 7..0 designate the maximium supported bitrate divided by 8kHz.Any Video Data Block will contain one or more 1-byte Short Video Descriptors (SVDs). They aredecoded as follows:bit 7: 1 to designate that this should be considered a "native" resolution, 0 for non-nativebit 6..0: index value to a table of standard resolutions/timings from CEA/EIA-861B:1 640x480p @ 59.94/60Hz 4:32 720x480p @ 59.94/60Hz 4:33 720x480p @ 59.94/60Hz 16:94 1280x720p @ 59.94/60Hz 16:95 1920x1080i @ 59.94/60Hz 16:96 720x480i @ 59.94/60Hz 4:37 720x480i @ 59.94/60Hz 16:98 720x240p @ 59.94/60Hz 4:39 720x240p @ 59.94/60Hz 16:910 2880x480i @ 59.94/60Hz 4:311 2880x480i @ 59.94/60Hz 16:912 2880x240p @ 59.94/60Hz 4:313 2880x240p @ 59.94/60Hz 16:914 1440x480p @ 59.94/60Hz 4:315 1440x480p @ 59.94/60Hz 16:916 1920x1080p @ 59.94/60Hz 16:917 720x576p @ 50Hz 4:318 720x576p @ 50Hz 16:919 1280x720p @ 50Hz 16:920 1920x1080i @ 50Hz 16:921 720x576i @ 50Hz 4:322 720x576i @ 50Hz 16:923 720x288p @ 50Hz 4:324 720x288p @ 50Hz 16:925 2880x576i @ 50Hz 4:326 2880x576i @ 50Hz 16:927 2880x288p @ 50Hz 4:328 2880x288p @ 50Hz 16:929 1440x576p @ 50Hz 4:330 1440x576p @ 50Hz 16:931 1920x1080p @ 50Hz 16:932 1920x1080p @ 23.97/24Hz 16:933 1920x1080p @ 25Hz 16:934 1920x1080p @ 29.97/30Hz 16:90, 35 - 127 ReservedA Vendor Specific Data Block (if any) contains as its first three bytes the vendor's IEEE24-bit registration number, LSB first. It is usually followed by a three byte source physical address, LSB first. The source physical address provides the CEC physical address for upstream CEC devices. The remainder of the Vendor Specific Data Block is the "data payload",which can be anything the vendor considers worthy of inclusion in this EDID extension block.If a Speaker Allocation Data Block is present, it will consist of three bytes. The second andthird are Reserved (all 0), but the first contains information about which speakers are present in the display device:bit 7: Reserved (0)bit 6: Rear Left Center / Rear Right Center present for 1, absent for 0bit 5: Front Left Center / Front Right Center present for 1, absent for 0bit 4: Rear Center present for 1, absent for 0bit 3: Rear Left / Rear Right present for 1, absent for 0bit 2: Front Center present for 1, absent for 0bit 1: LFE present for 1, absent for 0bit 0: Front Left / Front Right present for 1, absent for 0Note that for speakers with right and left polarity, it is assumed that bothleft and right are present."d": byte (designated in byte 02) where DTDs begin. 18-byte DTD strings continue for an unspecified length (modulo 18) until a "00 00" is as the first bytes of a prospective DTD. At this point, the DTDs are known to be complete, and the start address of the "00 00" can be considered to be "XX" (see below) "XX"-126: Post-DTD padding. Should be populated with 00h 127: Checksum.
On Microsoft Windows (Versions XP and above), there is no software provided option to disable plug and play monitor detection. This causes problems with computer/monitor switching applications and causes computer games to select display resolutions higher than the monitor is physically capable of displaying resulting in a garbled display.
In these circumstances, it may be necessary to remove pin 12 from the monitor VGA cable, to disable plug and play monitor detection. This allows display resolution to be selected manually and not overridden when the display adapter is removed and reinserted or the KVM switch is operated.
On Mac OS X, there is no option to disable EDID detection. This makes using a Mac connected to a DVI/HDMI video switcher very difficult (common scenario would be to use a Mac Mini as HTPC, hooked up to a HDTV through an AV receiver with HDMI switcher built in), as when the video is switched to a different source, the EDID information is not being relayed from the TV to the computer, therefore the operating system shuts down the video, the computer must be restarted to recover. There are hardware based solutions to this problem (like Gefen's DVI Detective unit, which can be programmed to broadcast the display's EDID to the computer even when the switcher is on a different source, or the TV is disconnected altogether).