ata) is a technique employed to achieve data level parallelism, as in a vector processor
. First made popular in large-scale supercomputers (contrary to MIMD
parallelization), smaller-scale SIMD operations have now become widespread in personal computer hardware. Today the term is associated almost entirely with these smaller units.
The first era of SIMD machines was characterized by supercomputers
like the Cray X-MP
. These machines were also called "vector processors." These machines operated on long vectors, for example adding two vectors of 100 numbers each. Supercomputing moved away from the SIMD approach when MIMD
approaches became more powerful, and interest in SIMD waned. Later, personal computers became common, and became powerful enough to support real-time gaming. This created a mass demand for a particular type of computing power, and microprocessor vendors turned to SIMD to meet the demand. The first widely-deployed SIMD for gaming was Intel's MMX
extensions to the x86
architecture. IBM and Motorola then added AltiVec
to the POWER
architecture, and there have been several extensions to the SIMD instruction sets for both architectures. All of these developments have been oriented toward support for real-time graphics, and are therefore oriented toward vectors of two, three, or four dimensions. When new SIMD architectures need to be distinguished from older ones, the newer architectures are then considered "short-vector" architectures. A modern supercomputer is almost always a cluster of MIMD machines, each of which implements (short-vector) SIMD instructions. A modern desktop computer is often a multiprocessor MIMD machine where each processor can execute short-vector SIMD instructions.
A separate class of processors exist for this sort of task, commonly referred to as Digital Signal Processors
, or DSP
s. The main difference between DSP and other SIMD-capable CPUs is that the DSPs are self-contained processors with their own (often difficult to use) instruction set, while SIMD-extensions rely on the general-purpose portions of the CPU
to handle the program details, and the SIMD instructions handle the data manipulation only. DSPs also tend to include instructions to handle specific types of data, sound or video for instance, while SIMD systems are considerably of more generic purpose. DSPs generally operate in Scratchpad RAM
driven by DMA transfers initiated from the host system and are unable to access external memory.
Some DSP include SIMD instruction sets. The inclusion of SIMD units in general purpose processors has supplanted the use of DSP chips in computer systems, though they continue to be used in embedded applications. A sliding scale exists - the Cell's SPUs and the Ageia Physics Processing Unit
could be considered half way between CPUs & DSPs, in that they are optimized for numeric tasks & operate in local store, but they can autonomously control their own transfers thus are in effect true CPUs.
An application that may take advantage of SIMD is one where the same value is being added (or subtracted) to a large number of data points, a common operation in many multimedia
applications. One example would be changing the brightness of an image. Each pixel
of an image consists of three values for the brightness of the red, green and blue portions of the color. To change the brightness, the R G and B values are read from memory, a value is added (or subtracted) from them, and the resulting values are written back out to memory.
With a SIMD processor there are two improvements to this process. For one the data is understood to be in blocks, and a number of values can be loaded all at once. Instead of a series of instructions saying "get this pixel, now get the next pixel", a SIMD processor will have a single instruction that effectively says "get lots of pixels" ("lots" is a number that varies from design to design). For a variety of reasons, this can take much less time than "getting" each pixel individually, like with traditional CPU design.
Another advantage is that SIMD systems typically include only those instructions that can be applied to all of the data in one operation. In other words, if the SIMD system works by loading up eight data points at once, the
add operation being applied to the data will happen to all eight values at the same time. Although the same is true for any superscalar processor design, the level of parallelism in a SIMD system is typically much higher.
- Many SIMD designers are hampered by design considerations outside their control. One of these considerations is the cost of adding registers for holding the data to be processed. Ideally one would want the SIMD units of a CPU to have their own registers, but many are forced for practical reasons to re-use existing CPU registers, typically the floating point registers. These tend to be 64-bits long, smaller than optimal for SIMD use, and lead to problems if the code attempts to use both SIMD and normal floating point instructions at the same time - at which point the units fight over the registers. Such a system was used in Intel's first attempt at SIMD, MMX, and the performance problems were such that the system saw very little use. However, recent x86 processor designs from Intel and AMD (as of November 2006, or several months prior) have eliminated the problems of shared SIMD and floating-point math registers, by providing a new, separate bank of SIMD registers.
- Packing and unpacking data to/from SIMD registers can be time-consuming in some applications, reducing the efficiency gained. If each datum (say, an 8-bit value) needs to be gathered/dispersed separately rather than loading an entire register in one operation, it is advisable to reorganize the data if possible, or consider not using SIMD at all.
- Though recently there has been a flurry of research activities into techniques for efficient compilation for SIMD, much remains to be done. For that matter, the state-of-the-art for SIMD, from a compiler perspective, is hardly comparable to that for vector processing.
- Because of the way SIMD works, the data in the registers must be well-aligned. Even for simple stream processing like convolution this can be a challenging task.
- Not all algorithms suit vectorization.
The first use of SIMD instructions was in vector supercomputers
of the early 1970s such as the CDC Star-100
and the Texas Instruments ASC
. Vector processing was especially popularized by Cray
in the 1970s and 1980s.
Later machines used a much larger number of relatively simple processors in a massively parallel processing-style configuration. Some examples of this type of machine included:
- ILLIAC IV, circa 1974
- ICL Distributed Array Processor (DAP), circa 1974
- Burroughs Scientific Processor, circa 1976
- Geometric-Arithmetic Parallel Processor, from Martin Marietta, starting in 1981, continued at Lockheed Martin, then at Teranex and Silicon Optix
- Massively Parallel Processor (MPP), from NASA/Goddard Space Flight Center, circa 1983-1991
- Connection Machine, models 1 and 2 (CM-1 and CM-2), from Thinking Machines Corporation, circa 1985
- MasPar MP-1 and MP-2, circa 1987-1996
- Zephyr DTC computer from Wavetracer, circa 1991
- Xplor, from Pyxsys, Inc., circa 2001
There were many others from that era too.
Small-scale (64 or 128 bits) SIMD has become popular on general-purpose CPUs, starting in 1989 with the introduction of the Digital Equipment Corporation VAX
Vector instructions in the Rigel system, and continuing through 1997 and later with Motion Video Instructions (MVI) for Alpha
. SIMD instructions can be found, to one degree or another, on most CPUs, including the IBM
's PA-RISC Multimedia Acceleration eXtensions
's MMX and iwMMXt
's ARC Video subsystem, SPARC
(MaDMaX) and MIPS-3D
. The IBM, Sony, Toshiba co-developed Cell Processor
's instruction set is heavily SIMD based.
The instruction sets generally include a full set of vector instructions, including multiply, invert and trace. These are particularly useful for processing 3D graphics, although modern graphics cards with embedded SIMD have largely taken over this task from the CPU. Some systems also include permute functions that re-pack elements inside vectors, making them particularly useful for data processing and compression.
Modern Graphics Processing Units are often very wide SIMD implementations, capable of branches, loads, and stores on 128 or 256 bits at a time.
Adoption of SIMD systems in personal computer
software has been slow, due to a number of problems. One was that many of the early SIMD instruction sets tended to slow overall performance of the system due to the re-use of existing floating point registers. Other systems, like MMX
, offered support for data types that were not interesting to a wide audience and had expensive context switching instructions to switch between using the FPU
and MMX registers
. Compilers also often lacked support requiring programmers to resort to assembly language
SIMD on x86 has had a slow start. The introduction of 3DNow! by AMD and SSE by Intel confused matters somewhat, but today the system seems to have settled down (after AMD adopting SSE) and newer compilers should result in more SIMD-enabled software. Intel and AMD now both provide optimized math libraries that use SIMD instructions, and open source alternatives like libSIMD and SIMDx86 have started to appear.
Apple Computer had somewhat more success, even though they entered the SIMD market later than the rest. AltiVec offered a rich system and can be programmed using increasingly sophisticated compilers from Motorola, IBM and GNU, therefore assembly language programming is rarely needed. Additionally, many of the systems that would benefit from SIMD were supplied by Apple itself, for example iTunes and QuickTime. However, in 2006, Apple computers moved to Intel x86 processors. Apple's APIs and development tools (XCode) were rewritten to use SSE2 and SSE3 instead of AltiVec. Apple was the dominant purchaser of PowerPC chips from IBM and Freescale Semiconductor and even though they abandoned the platform, further development of AltiVec is continued in several Power Architecture designs from Freescale, IBM and P.A. Semi.
SIMD within a register, or SWAR, is a range of techniques and tricks used for performing SIMD in general-purpose registers on hardware that doesn't provide any direct support for SIMD instructions. This can be used to exploit parallelism in certain algorithms even on hardware that does not support SIMD directly.
Though it has generally proven difficult to find sustainable commercial applications for SIMD processors, one that has had some measure of success is the GAPP
, which was developed by Lockheed Martin
and taken to the commercial sector by their spin-off Teranex
. The GAPP's recent incarnations have become a powerful tool in real-time video processing
applications like conversion between various video standards and frame rates (NTSC
, NTSC to/from HDTV
formats, etc.), deinterlacing
, image noise reduction
, adaptive video compression
, and image enhancement.
A more ubiquitous application for SIMD is found in video games: nearly every modern video game console since 1998 has incorporated a SIMD processor somewhere in its architecture. The Sony PlayStation 2 was unusual in that its vector-float units could function as autonomous DSPs executing their own instruction streams, or as coprocessors driven by ordinary CPU instructions. 3D graphics applications tend to lend themselves well to SIMD processing as they rely heavily on operations with 4-dimensional vectors. Microsoft's Direct3D 9.0 now chooses at runtime processor-specific implementations of its own math operations, including the use of SIMD-capable instructions.
One of the very recent processors to use vector processing is the Cell Processor developed by IBM in cooperation with Toshiba and Sony. It uses a number of SIMD processors (each with independent RAM and controlled by a general purpose CPU) and is geared towards the huge datasets required by 3D and video processing applications.
Larger scale commercial SIMD processors are available from ClearSpeed Technology, Ltd. and Stream Processors, Inc ClearSpeed's CSX600 (2004) has 96 cores each with 2 double-precision floating point units while the CSX700 (2008) has 192. Stream Processors is headed by computer architect Bill Dally. Their Storm-1 processor (2007) contains 80 SIMD cores controlled by a MIPS CPU.