In telecommunication, a non-return-to-zero (NRZ) line code is a binary code in which "1s" are represented by one significant condition (usually a positive voltage) and "0s" are represented by some other significant condition (usually a negative voltage), with no other neutral or rest condition. The pulses have more energy than a RZ code. Unlike RZ, NRZ does not have a rest state. NRZ is not inherently a self-synchronizing code, so some additional synchronization technique (perhaps a run length limited constraint, or a parallel synchronization signal) must be used to avoid bit slip.
When used to represent data in an asynchronous communication scheme, the absence of a neutral state requires other mechanisms for data recovery, to replace methods used for error detection when using synchronization information when a separate clock signal is available.
NRZ-Level itself is not a synchronous system but rather an encoding that can be used in either a synchronous or asynchronous transmission environment, that is, with or without an explicit clock signal involved. Because of this, it is not strictly necessary to discuss how the NRZ-Level encoding acts "on a clock edge" or "during a clock cycle" since all transitions happen in the given amount of time representing the actual or implied integral clock cycle. The real question is that of sampling--the high or low state will be received correctly provided the transmission line has stabilized for that bit when the physical line level is sampled at the receiving end.
However, it is handy to see NRZ transitions as happening on the trailing (falling) clock edge in order to compare NRZ-Level to other encoding methods, such as the mentioned Manchester code, which requires clock edge information (is the XOR of the clock and NRZ, actually) and to see the difference between NRZ-Mark and NRZ-Inverted.
"Zero" is represented by another level (usually a positive voltage).
In clock language, "one" transitions or remains high on the trailing clock edge of the previous bit and "zero" transitions or remains low on the trailing clock edge of the previous bit, or just the opposite. This allows for long series without change, which makes synchronization difficult. One solution is to only send bytes with lots of transitions, see RLL.
The diagram shows a line representing the physical zero below the biased logical zero--showing the less usual case of "one" being a high voltage.
"Zero is represented by another level (usually a positive voltage).
In clock language, in bipolar NRZ-Level the voltage "swings" from positive to negative on the trailing edge of the previous bit clock cycle.
An example of this is RS-232, where "one" is -5V to -12V and "zero" is +5 to +12V.
"One" is represented by a change in physical level.
"Zero" is represented by no change in physical level.
In clock language, the physical level transitions on the trailing clock edge of the previous bit to represent a "one." No transition occurs for a "zero."
When looking at the diagrams for transition-based encoding, it is important to realize that they might be inverted or partially inverted if the physical state were assumed to be the opposite just before the first bit in the diagram.
This encoding is commonly referred to as just "NRZ" in other contexts; FIPS 1037 also lists "non-return-to-zero change-on-ones" and "non-return-to-zero one" as encoding names that seem to mean the same thing.
"One" is represented by no change in physical level.
"Zero" is represented by a change in physical level.
In clock language, the level transitions on the trailing clock edge of the previous bit to represent a "zero."
This "change-on-zero" is used by High-Level Data Link Control and USB. They both avoid long periods of no transitions (even when the data contains long sequences of 1 bits) by using zero-bit insertion. HDLC transmitters insert a 0 bit after five contiguous 1 bits (except when transmitting the frame delimiter '01111110'). USB transmitters insert a 0 bit after six consecutive 1 bits. The receiver at the far end uses every transition -- both from 0 bits in the data and these extra non-data 0 bits -- to maintain clock synchronization. The receiver otherwise ignores these non-data 0 bits.
Non return to zero, inverted (NRZI) is a method of mapping a binary signal to a physical signal for transmission over some transmission media. The two level NRZI signal has a transition at a clock boundary if the bit being transmitted is a logical one, and does not have a transition if the bit being transmitted is a logical zero.
"One" is represented by a transition of the physical level.
"Zero" has no transition.
Also, NRZI might take the opposite convention, as in Universal Serial Bus (USB) signalling, when in Mode 1 (transition when signalling zero and steady level when signalling one). The transition occurs on the leading edge of the clock for the given bit. This distinguishes NRZI from NRZ-Mark.
However, even NRZI can have long series of zeros (or ones if transitioning on "zero"), so clock recovery can be difficult unless some form of run length limited coding is used on top. Magnetic disk and tape generally uses fixed-rate RLL codes, while USB uses bit stuffing, which is efficient, but results in a variable data rate: it takes slightly longer to send a long string of 1 bits over USB than it does to send a long string of 0 bits. (USB inserts an additional 0 bit after 6 consecutive 1 bits.)