machine cycle

Motorola 6809

The Motorola 6809 is an 8-bit (arguably, an 8/16-bit) microprocessor CPU from Motorola, introduced circa 1979. It was a major advance over both its predecessor, the Motorola 6800, and the related, MOS Technology 6502.


Among the significant enhancements introduced in the 6809 were the use of two 8-bit accumulators (A and B, which could be combined into a single 16-bit register, D), two 16-bit index registers (X, Y) and two 16-bit stack pointers (U, S). The index and stack registers allowed very advanced addressing modes.

The 6809 was source-compatible with the 6800, though the 6800 had seventy-eight instructions to the 6809's fifty-nine. Some instructions were replaced by more general ones which the assembler translated into equivalent operations and some were even replaced by addressing modes. The instruction set and register complement were highly orthogonal, making the 6809 easier to program than the 6800 or 6502.

Other features were one of the first hardware-implementations of a multiplication instruction in an MPU, full 16-bit arithmetic and an especially fast interrupt system. The 6809 was also highly optimized, up to five times faster than the 6800 series CPUs. Like the 6800, it included an undocumented address bus test instruction that would exceed the limits of some memory controllers, evoking the nickname Halt and Catch Fire (HCF).

The 6809's state machine and control logic, unlike many processors of the day, was mostly implemented using a large PLA and asynchronous random logic (a common trait of early designs as well as RISC CPUs) rather than microcoded. This means it used only one clock cycle per machine cycle and therefore fewer clock cycles per instruction compared to the Z80 for instance, one of the 6809's main competitors. For example, the instruction ADDA 63 took three clock cycles, compared to the seven clock cycles of ADD A,63 on a Z80, which therefore needs at least twice the clock speed to match the 6809 on this particular operation. However, the more synchronous Z80 design could typically employ 3-5 times the clock frequency of the 6809, 6800, or 6502 without demanding faster memory chips (often the limiting factor). This is because these largely asynchronous designs allows only approximately half a clock cycle for actual memory access (see data sheets), while the high resolution state machine in the Z80 can combine 2-3 (short) clock cycles into a relatively long memory access period.

The 6809 had an internal clock generator (needing only an external crystal) whereas the 6809E needed an external clock generator. There were also variants such as the 68A09(E) and 68B09(E); the internal letter indicates the processor's rated clock speed.


The Motorola 6809 was originally produced in 1 MHz, 1.5 MHz (68A09) and 2 MHz (68B09) speed ratings. Faster versions were produced later by Hitachi and perhaps others. It is sometimes considered to be the conceptual precursor of the Motorola 68000 family of processors, though this is mostly a misunderstanding. The 6809 and 68000 design projects ran largely in parallel and both processors were released in 1979. There is a certain amount of design philosophy similarity (eg, considerable orthogonality and flexible addressing modes), some assembly language syntax resemblance, as well as opcode mnemonic similarity, but the 6809 is a derivative of the 6800 whereas the 68000 was a totally new design. An 8-bit data bus version of the 68000 (ie, the 68008) was intended for use in future 8-bit designs. In that respect, the 6809 was rather quickly an evolutionary dead-end.

The 6809 design team believed that future system integrators would look to off-the-shelf code in ROMs to handle common tasks. An example of this might be binary floating point arithmetic, which is a common requirement in many systems. In order to speed time to market, common code modules would be purchased, rather than developed in-house, and integrated into systems with code from other manufacturers. Since a CPU designer could hardly guarantee where this code would be located in a future system, the 6809 design focused heavily on support of position-independent, reentrant (subroutine) code that could be freely located anywhere in the memory map. This expectation was, in reality, never quite met: Motorola's only released example of a ROM'd software module was the MC6839 floating-point ROM. However, the decisions made by the design team made for a very powerful processor and made possible advanced operating systems like OS-9 and UniFlex, which took advantage of the position-independent, re-entrant nature of the 6809.

The 6809 was used in Commodore's dual-CPU SuperPET computer, and, in its 68A09 incarnation, in the unique vector graphics based Vectrex home video game console with built-in screen display. The 6809E was used in the TRS-80 Color Computer (CoCo), the Acorn System 2, 3 and 4 computers (as an optional alternative to their standard 6502) and in the CoCo's UK clone, the Welsh-made Dragon 32/64 home computers, and the SWTPC, Gimix, Smoke Signal Broadcasting, etc SS-50 bus systems, in addition to several of Motorola's own EXORmacs development systems. In France, Thomson micro-informatique produced a series of micro-computers based on the 6809E (TO7, TO7/70, TO8, TO8D, TO9, TO9Plus, MO5, MO6, MO5E and MO5NR).

In addition to home computers and game consoles, the 6809 was also utilized in a number of arcade games released during the early to mid 1980s. Williams Electronics was an especially prolific user of the processor, which was deployed in arcade hits such as Defender, Joust, Sinistar, and Robotron: 2084. Williams also utilized the processor in many of its solid-state pinball machines; a specialized version of the 6809 CPU formed the core of the successful Williams Pinball Controller.

Software development company Microware developed the original OS-9 operating system (not to be confused with the more recent Mac OS 9) for the 6809, later porting it to the 68000 and i386 series of microprocessors.

The Hitachi 6309 was an enhanced version of the 6809 with extra registers and additional instructions, including block move, additional multiply instructions and hardware-implemented division. It was used in unofficially-upgraded CoCo 3 computers and a version of OS-9 was written to take advantages of the 6309's extra features: NitrOS-9.

Hitachi also produced its own 6809-based machines, the MB6890 and later the S1. These were primarily for the Japanese market, but some were exported to and sold in Australia. There the MB6890 was dubbed the "Peach", probably in ironic reference to the popularity of the Apple II. The S1 was notable in that it contained paging hardware extending the 6809's native 64 kilobyte (64×210 byte) addressing range to a full 1 megabyte (1×220 byte) in 4 KB pages. It was similar in this to machines produced by SWTPC, Gimix, and several other suppliers. TSC produced a Unix-like operating system uniFlex which ran only on such machines. OS-9 Level II, also took advantage of such memory management facilities. Most other computers of the time with more than 64 KB of memory addressing were limited to bank switching where much if not all the 64 KB was simply swapped for another section of memory.

Neither Motorola nor Hitachi produce 6809 processors or derivatives anymore, despite the 6809 being one of the most powerful general-purpose 8-bit CPUs ever produced. Many of its innovative features have since been copied. 6809 cores are available in VHDL and can be programmed into FPGA and used as an embedded processor with speed ratings up to 40 MHz. Some 6809 opcodes also live on in the Freescale embedded processors.


  • Leventhal, Lance (1981). 6809 Assembly Language Programming. Osborne/McGraw-Hill. ISBN 0-931988-35-7.
  • Warren, Carl D (1980). The MC6809 Cookbook. TAB Books, Inc. ISBN 0-8306-9683-0.

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