The 6309 is Hitachi's CMOS version of the Motorola 6809 microprocessor. While in "Emulation Mode" it is fully compatible with the 6809. To the 6809 specifications it adds higher clock rates, enhanced features, new instructions, and additional registers. Most new instructions were added to support the additional registers, as well as up to 32-bit math, hardware division, bit manipulations, and block transfers. The 6309 is generally 30% faster in native mode than the 6809.
Surprisingly, this information was never published by Hitachi. The April 1988 issue of Oh! FM, a Japanese magazine for Fujitsu personal computer users, contained the first description of the 6309's additional capabilities. Later, Hirotsugu Kakugawa posted details of the 6309's new features and instructions to comp.sys.m6809. This led to the development of NitrOS9 for the Tandy Color Computer 3.
Differences from the Motorola 6809
The 6309 differs from the 6809 in several key areas.
The 6309 is fabricated in CMOS
technology, while the 6809 is an NMOS
device. As a result, the 6309 requires less power to operate than the 6809. It is also a fully static
device, which will not lose internal state information. This means it can be used with external DMA without needing refresh every 14 cycles as the 6809 does.
The 6309 has B (2 MHz) versions as the 6809 does. However, a "C" speed rating was produced with either a 3.0 or 3.5 MHz maximum clock rate, depending on which datasheet is referenced. (Several Japanese computers had 63C09 CPUs clocked at 3.58 MHz, the NTSC colorburst
frequency, so the 3.5 rating seems most likely). Anecdotal and individual reports indicate that the 63C09 variant can be clocked at 5 MHz with no ill effects. Like the 6809, the Hitachi CPU comes in both internal and external clock versions (HD63B/C09 and HD63B/C09E respectively)
When switched into 6309 Native Mode (as opposed to the default 6809-compatible mode) many key instructions will complete in fewer clock cycles. This often improves execution speeds by up to 30%.
- There are two additional 8-bit accumulators, E and F. These can be concatenated to form a 16-bit accumulator called W. The existing 6809 16-bit accumulator, D, can also be concatenated with W to form a 32-bit accumulator Q. (Presumably standing for "Quad").
- A "Transfer register", V, which is only accessible via inter-register instructions. Its value is not cleared during a hardware reset, so it can maintain a constant 'Value', hence "V".
- An 8/16-bit Zero register, called 0, is provided for speeding up operations where a zero constant is used. This register always returns a zero value, and writing to it has no effect.
- A new mode register, MD, which controls the 6309's operating mode and operates as a secondary condition code. Only 4 bits of this register are defined.
Most of the new instructions are modifications of existing instructions to handle the existence of the additional registers, such as load, store, add, and the like. Genuine 6309 additions include inter-register arithmetic, block transfers, hardware division, and bit-level manipulations.
Despite the user-friendliness of the additional instructions, analysis by 6809 programming gurus indicates that many of the new instructions are actually slower than the equivalent 6809 code, especially in tight loops. Careful analysis should be done to ensure that the programmer uses the most efficient code for the particular application.
Additional Hardware Features
It is possible to change the mode of operation for the FIRQ interrupt. Instead of stacking the PC and CC registers (normal 6809 behavior) the FIRQ interrupt can be set to stack the entire register set, as the IRQ interrupt does. In addition, The 6309 has two possible trap modes, one for an illegal instruction fetch and one for division by zero. The illegal instruction fetch is not maskable, and many TRS-80 Color Computer
users reported that their 6309's were "buggy" when in reality it was an indicator of enhanced and unknown features.
Notes and references