|Manufacturer:||Digital Equipment Corporation|
|Byte size:||8 bits (octet)|
|Address bus size:||32 bits|
|Peripheral bus:||Unibus, Massbus, Q-Bus, XMI, VAXBI|
|Architecture:||CISC, virtual memory|
|Operating systems:||VAX/VMS, Ultrix, BSD UNIX, VAXELN|
VAX is a 32-bit computing architecture that supports an orthogonal instruction set (machine language) and virtual addressing (i.e. demand paged virtual memory). It was developed in the mid-1970s by Digital Equipment Corporation (DEC). DEC was later purchased by Compaq, which in turn was purchased by Hewlett-Packard.
The VAX has been perceived as the quintessential CISC processing architecture, with its very large number of addressing modes and machine instructions, including instructions for such complex operations as queue insertion/deletion and polynomial evaluation.
"VAX" was originally an acronym for Virtual Address eXtension, both because the VAX was seen as a 32-bit extension of the older 16-bit PDP-11 and because it was (after Prime Computer) an early adopter of virtual memory to manage this larger address space. Early versions of the VAX processor implemented a "compatibility mode" that emulated many of the PDP-11's instructions, and were in fact called VAX-11 to highlight this compatibility and the fact that VAX-11 was an outgrowth of the PDP-11 family. Later versions offloaded the compatibility mode and some of the less used CISC instructions to emulation in the operating system software. The plural form of VAX is usually VAXes, but VAXen is also heard.
The "native" VAX operating system is DEC's VAX/VMS (renamed to OpenVMS in 1991 or 1992 when it was ported to DEC Alpha, "branded" by the X/Open consortium, and modified to comply with POSIX standards). The VAX architecture and VMS operating system were "engineered concurrently" to take maximum advantage of each other, as was the initial implementation of the VAXcluster facility. Other VAX operating systems have included various releases of BSD UNIX up to 4.3BSD, Ultrix-32 and VAXELN. More recently, NetBSD and OpenBSD support various VAX models and some work has been done on porting Linux to the VAX architecture.
The first VAX model sold was the VAX-11/780, which was introduced on October 25, 1977 at the Digital Equipment Corporation's Annual Meeting of Shareholders. Bill Strecker, C. Gordon Bell's doctoral student at Carnegie-Mellon University, was responsible for the architecture. Many different models with different prices, performance levels, and capacities were subsequently created. VAX superminis were very popular in the early 1980s.
For a while the VAX-11/780 was used as a baseline in CPU benchmarks because its speed was about one MIPS. Ironically enough, though, the actual number of instructions executed in 1 second was about 500,000. One VAX MIPS was the speed of a VAX-11/780; a computer performing at 27 VAX MIPS would run the same program roughly 27 times as fast as the VAX-11/780. Within the Digital community the term VUP (VAX Unit of Performance) was the more common term, because MIPS do not compare well across different architectures. The related term cluster VUPs was informally used to describe the aggregate performance of a VAXcluster. The performance of the VAX-11/780 still serves as the baseline metric in the BRL-CAD Benchmark, a performance analysis suite included in the BRL-CAD solid modeling software distribution.
The VAX went through many different implementations. The original VAX was implemented in TTL and filled more than one rack for a single CPU. CPU implementations that consisted of multiple ECL gate array or macrocell array chips included the 8600, 8800 superminis and finally the 9000 mainframe class machines. CPU implementations that consisted of multiple MOSFET custom chips included the 8100 and 8200 class machines.
The MicroVAX I represented a major transition within the VAX family. At the time of its design, it was not yet possible to implement the full VAX architecture as a single VLSI chip (or even a few VLSI chips as was later done with the V-11 CPU of the VAX 8200/8300). Instead, the MicroVAX I was the first VAX implementation to move most of the complexity of the VAX instruction set into emulation software, preserving just the core instructions in hardware. This new partitioning substantially reduced the amount of microcode required and was referred to as the "MicroVAX" architecture. In the MicroVAX I, the ALU and registers were implemented as a single gate-array chip while the rest of the machine control was conventional logic.
A full VLSI (microprocessor) implementation of the MicroVAX architecture then arrived with the MicroVAX II's 78032 (or DC333) CPU and 78132 (DC335) FPU. The 78032 was the first microprocessor with an on-board memory management unit The MicroVAX II was based on a single, quad-sized processor board which carried the processor chips and ran the MicroVMS or Ultrix-32 operating systems. The machine featured 1 MB of on-board memory and a Q22-bus interface with DMA transfers. The MicroVAX II was succeeded by many further MicroVAX models with much improved performance and memory.
Further VLSI VAX processors followed in the form of the V-11, CVAX, SOC ("System On Chip", a single-chip CVAX), Rigel, Mariah and NVAX implementations. The VAX microprocessors extended the architecture to inexpensive workstations and later also supplanted the high-end VAX models. This wide range of platforms (mainframe to workstation) using one architecture was unique in the computer industry at that time. Sundry graphics were etched onto the CVAX microprocessor die. The phrase CVAX... when you care enough to steal the very best was etched in broken Russian as a play on a Hallmark Cards slogan, intended as a message to Soviet engineers who were known to be both purloining DEC computers for military applications, along with reverse engineering their chip design.
The VAX architecture was eventually superseded by RISC technology. In 1989 DEC introduced a range of workstations and servers that ran Ultrix, the DECstation and DECsystem respectively, based on processors that implemented the MIPS architecture. In 1992 DEC introduced their own RISC instruction set architecture, the Alpha AXP (later renamed Alpha), and their own Alpha-based microprocessor, the DECchip 21064, a high performance 64-bit capable of running OpenVMS.
In August 2000, Compaq announced that the remaining VAX models would be discontinued by the end of the year. By 2005 all manufacturing of VAX computers had ceased, but old systems remain in widespread use.
The SRI CHARON-VAX and SIMH software-based VAX emulators remain available.
|P0||0x00000000 - 0x3fffffff|
|P1||0x40000000 - 0x7fffffff|
|S0||0x80000000 - 0xbfffffff|
|S1||0xc0000000 - 0xffffffff|
|0||Kernel||OS Kernel||Highest Privilege Level|
|3||User||Normal Programs||Lowest Privilege Level|
|31||PDP-11 compatibility mode|
|29:28||MBZ (must be zero)|
|27||first part done (interrupted instruction)|
|25:24||current privilege mode|
|23:22||previous privilege mode|
|21||MBZ (must be zero)|
|20:16||IPL (interrupt priority level)|
|15:8||MBZ (must be zero)|
|7||decimal overflow trap enable|
|6||floating-point underflow trap enable|
|5||integer overflow trap enable|
VAX 11/780: Star, TTL CPU, October 1977VAX 11/750: Comet, More-compact, lower-performance TTL gate array-based implementation, October 1980VAX 11/751: ruggedized rack-mount 11/750VAX 11/730: Nebula, Still-more-compact, still-lower-performance bit slice implementation, April 1982VAX 11/782: Atlas, Dual-processor 11/780VAX 11/784: VAXimus, Four 11/780 CPUs sharing a single MA780 memory unit. Very rareVAX 11/785: Superstar, Faster 11/780, April 1984VAX 11/787: dual processor 11/785VAX 11/788: VISQVAX 11/725: LCN, Low-Cost NebulaVAX 8600: Venus, aka 11/790 during development, ECL gate array CPU, October 1984VAX 8650: Morningstar, aka 11/795 during development, a faster 8600, last model to use SBI backplane also used by VAX 11/78x models, last model to have PDP-11 compatibility mode. All subsequent 8000 series models use VAXBI instead of SBIVAX 8x00: Gemini, Fall-back in case the LSI-based Scorpio failed (never shipped)VAX 8500: Flounder, Single-processor, deliberately-slowed VAX 8700VAX 8530: Skipjack, Single-processor, less-slowed VAX 8700VAX 8550: Skipjack, Single-processor 8800, unexpandableVAX 8700: Nautilus, Single-processor Nautilus, expandable to full 8800VAX 8800: Nautilus, Dual-processor ECL Macrocell array-based implementation, January 1986. Later also known as VAX 8820NVAX 8810/8820/8830/8840: Polarstar, a Nautilus variant with one to four processors and an updated console processorVAX 8974/8978: cluster comprising four or eight VAX 8810s respectively, January 1987VAX 9000: Aridus, Air-cooled. Originally designed to be water-cooled, named Aquarius, ECL macrocell array CPU, VAXBI, October 1989