Definitions

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VAX

DEC VAX
Manufacturer: Digital Equipment Corporation
Byte size: 8 bits (octet)
Address bus size: 32 bits
Peripheral bus: Unibus, Massbus, Q-Bus, XMI, VAXBI
Architecture: CISC, virtual memory
Operating systems: VAX/VMS, Ultrix, BSD UNIX, VAXELN

VAX is a 32-bit computing architecture that supports an orthogonal instruction set (machine language) and virtual addressing (i.e. demand paged virtual memory). It was developed in the mid-1970s by Digital Equipment Corporation (DEC). DEC was later purchased by Compaq, which in turn was purchased by Hewlett-Packard.

The VAX has been perceived as the quintessential CISC processing architecture, with its very large number of addressing modes and machine instructions, including instructions for such complex operations as queue insertion/deletion and polynomial evaluation.

Name

"VAX" was originally an acronym for Virtual Address eXtension, both because the VAX was seen as a 32-bit extension of the older 16-bit PDP-11 and because it was (after Prime Computer) an early adopter of virtual memory to manage this larger address space. Early versions of the VAX processor implemented a "compatibility mode" that emulated many of the PDP-11's instructions, and were in fact called VAX-11 to highlight this compatibility and the fact that VAX-11 was an outgrowth of the PDP-11 family. Later versions offloaded the compatibility mode and some of the less used CISC instructions to emulation in the operating system software. The plural form of VAX is usually VAXes, but VAXen is also heard.

Operating systems

The "native" VAX operating system is DEC's VAX/VMS (renamed to OpenVMS in 1991 or 1992 when it was ported to DEC Alpha, "branded" by the X/Open consortium, and modified to comply with POSIX standards). The VAX architecture and VMS operating system were "engineered concurrently" to take maximum advantage of each other, as was the initial implementation of the VAXcluster facility. Other VAX operating systems have included various releases of BSD UNIX up to 4.3BSD, Ultrix-32 and VAXELN. More recently, NetBSD and OpenBSD support various VAX models and some work has been done on porting Linux to the VAX architecture.

History

The first VAX model sold was the VAX-11/780, which was introduced on October 25, 1977 at the Digital Equipment Corporation's Annual Meeting of Shareholders. Bill Strecker, C. Gordon Bell's doctoral student at Carnegie-Mellon University, was responsible for the architecture. Many different models with different prices, performance levels, and capacities were subsequently created. VAX superminis were very popular in the early 1980s.

For a while the VAX-11/780 was used as a baseline in CPU benchmarks because its speed was about one MIPS. Ironically enough, though, the actual number of instructions executed in 1 second was about 500,000. One VAX MIPS was the speed of a VAX-11/780; a computer performing at 27 VAX MIPS would run the same program roughly 27 times as fast as the VAX-11/780. Within the Digital community the term VUP (VAX Unit of Performance) was the more common term, because MIPS do not compare well across different architectures. The related term cluster VUPs was informally used to describe the aggregate performance of a VAXcluster. The performance of the VAX-11/780 still serves as the baseline metric in the BRL-CAD Benchmark, a performance analysis suite included in the BRL-CAD solid modeling software distribution.

The VAX went through many different implementations. The original VAX was implemented in TTL and filled more than one rack for a single CPU. CPU implementations that consisted of multiple ECL gate array or macrocell array chips included the 8600, 8800 superminis and finally the 9000 mainframe class machines. CPU implementations that consisted of multiple MOSFET custom chips included the 8100 and 8200 class machines.

The MicroVAX I represented a major transition within the VAX family. At the time of its design, it was not yet possible to implement the full VAX architecture as a single VLSI chip (or even a few VLSI chips as was later done with the V-11 CPU of the VAX 8200/8300). Instead, the MicroVAX I was the first VAX implementation to move most of the complexity of the VAX instruction set into emulation software, preserving just the core instructions in hardware. This new partitioning substantially reduced the amount of microcode required and was referred to as the "MicroVAX" architecture. In the MicroVAX I, the ALU and registers were implemented as a single gate-array chip while the rest of the machine control was conventional logic.

A full VLSI (microprocessor) implementation of the MicroVAX architecture then arrived with the MicroVAX II's 78032 (or DC333) CPU and 78132 (DC335) FPU. The 78032 was the first microprocessor with an on-board memory management unit The MicroVAX II was based on a single, quad-sized processor board which carried the processor chips and ran the MicroVMS or Ultrix-32 operating systems. The machine featured 1 MB of on-board memory and a Q22-bus interface with DMA transfers. The MicroVAX II was succeeded by many further MicroVAX models with much improved performance and memory.

Further VLSI VAX processors followed in the form of the V-11, CVAX, SOC ("System On Chip", a single-chip CVAX), Rigel, Mariah and NVAX implementations. The VAX microprocessors extended the architecture to inexpensive workstations and later also supplanted the high-end VAX models. This wide range of platforms (mainframe to workstation) using one architecture was unique in the computer industry at that time. Sundry graphics were etched onto the CVAX microprocessor die. The phrase CVAX... when you care enough to steal the very best was etched in broken Russian as a play on a Hallmark Cards slogan, intended as a message to Soviet engineers who were known to be both purloining DEC computers for military applications, along with reverse engineering their chip design.

The VAX architecture was eventually superseded by RISC technology. In 1989 DEC introduced a range of workstations and servers that ran Ultrix, the DECstation and DECsystem respectively, based on processors that implemented the MIPS architecture. In 1992 DEC introduced their own RISC instruction set architecture, the Alpha AXP (later renamed Alpha), and their own Alpha-based microprocessor, the DECchip 21064, a high performance 64-bit capable of running OpenVMS.

In August 2000, Compaq announced that the remaining VAX models would be discontinued by the end of the year. By 2005 all manufacturing of VAX computers had ceased, but old systems remain in widespread use.

The SRI CHARON-VAX and SIMH software-based VAX emulators remain available.

Processor architecture

Virtual Memory Map

The VAX virtual memory is divided into four sections, each of which is one gigabyte in size:
Section Address Range
P0 0x00000000 - 0x3fffffff
P1 0x40000000 - 0x7fffffff
S0 0x80000000 - 0xbfffffff
S1 0xc0000000 - 0xffffffff
For VMS, P0 was used for user process space, P1 for process stack, S0 for the operating system, and S1 was reserved.

Privilege Modes

The VAX has four privilege modes:
No. Mode VMS Usage Notes
0 Kernel OS Kernel Highest Privilege Level
1 Executive File System
2 Supervisor Shell (DCL)
3 User Normal Programs Lowest Privilege Level

Processor Status Register

CM TP MBZ FD IS cmod pmod MBZ IPL MBZ DV FU IV T N Z V C
31 30 29 27 26 25 23 21 20 15 7 6 5 4 3 2 1 0

Bits Meaning
31 PDP-11 compatibility mode
30 trace pending
29:28 MBZ (must be zero)
27 first part done (interrupted instruction)
26 interrupt stack
25:24 current privilege mode
23:22 previous privilege mode
21 MBZ (must be zero)
20:16 IPL (interrupt priority level)
15:8 MBZ (must be zero)
7 decimal overflow trap enable
6 floating-point underflow trap enable
5 integer overflow trap enable
4 trace
3 negative
2 zero
1 overflow
0 carry

VAX models

Listed in roughly chronological order. The codenames used during development within Digital Equipment Corporation are shown in italic. VAX systems can be broadly classified into those with non-VLSI processors and those with VLSI processors with the MicroVAX-I being a transitional design:

Non-VLSI VAXen

VAX 11/780: Star, TTL CPU, October 1977VAX 11/750: Comet, More-compact, lower-performance TTL gate array-based implementation, October 1980VAX 11/751: ruggedized rack-mount 11/750VAX 11/730: Nebula, Still-more-compact, still-lower-performance bit slice implementation, April 1982VAX 11/782: Atlas, Dual-processor 11/780VAX 11/784: VAXimus, Four 11/780 CPUs sharing a single MA780 memory unit. Very rareVAX 11/785: Superstar, Faster 11/780, April 1984VAX 11/787: dual processor 11/785VAX 11/788: VISQVAX 11/725: LCN, Low-Cost NebulaVAX 8600: Venus, aka 11/790 during development, ECL gate array CPU, October 1984VAX 8650: Morningstar, aka 11/795 during development, a faster 8600, last model to use SBI backplane also used by VAX 11/78x models, last model to have PDP-11 compatibility mode. All subsequent 8000 series models use VAXBI instead of SBIVAX 8x00: Gemini, Fall-back in case the LSI-based Scorpio failed (never shipped)VAX 8500: Flounder, Single-processor, deliberately-slowed VAX 8700VAX 8530: Skipjack, Single-processor, less-slowed VAX 8700VAX 8550: Skipjack, Single-processor 8800, unexpandableVAX 8700: Nautilus, Single-processor Nautilus, expandable to full 8800VAX 8800: Nautilus, Dual-processor ECL Macrocell array-based implementation, January 1986. Later also known as VAX 8820NVAX 8810/8820/8830/8840: Polarstar, a Nautilus variant with one to four processors and an updated console processorVAX 8974/8978: cluster comprising four or eight VAX 8810s respectively, January 1987VAX 9000: Aridus, Air-cooled. Originally designed to be water-cooled, named Aquarius, ECL macrocell array CPU, VAXBI, October 1989

;VAX 9000 Model 110
;VAX 9000 Model 210
;VAX 9000 Model 310
;VAX 9000 Model 4x0: x = number of processors, 1–4VAX XXXX: BVAX, High-end ECL-based VAX (never shipped)

A transitional VAX

MicroVAX/VAXstation I: Seahorse, KD32 CPU, October 1984

VLSI VAXen

MicroVAX series: some models also sold as VAXservers

;MicroVAX II: Mayflower, KA630 CPU, May 1985
;Industrial VAX 630: MicroVAX II in BA213 enclosure
;MicroVAX III: BA23- or BA123-enclosure MicroVAX upgraded with KA650 CVAX CPU
;MicroVAX III+: BA23- or BA123-enclosure MicroVAX upgraded with KA655 CPU
;VAX 4: BA23- or BA123-enclosure MicroVAX upgraded with KA660 CPU

;MicroVAX 2000: TeamMate, desktop form factor, February 1987

;MicroVAX 3100 series: desktop form-factor, 1987 onwards
;MicroVAX 3100 Model 10: TeamMate II, KA41-A CVAX processor
;MicroVAX 3100 Model 10e: TeamMate II, KA41-D CVAX+ processor
;MicroVAX 3100 Model 20: Model 10 in larger enclosure
;MicroVAX 3100 Model 20e: Model 20 in larger enclosure
;MicroVAX 3100 Model 30: Waverley/S, KA45 SOC CPU
;MicroVAX 3100 Model 40: Model 30 in larger enclosure
;MicroVAX 3100 Model 80: Waverley/M, KA47 Mariah CPU
;MicroVAX 3100 Model 85: Waverley/M+, KA55 NVAX CPU
;MicroVAX 3100 Model 88: Waverley/M+, KA58 NVAX CPU
;MicroVAX 3100 Model 90: Cheetah, KA50 NVAX CPU
;MicroVAX 3100 Model 95: Cheetah+, KA51 NVAX CPU
;MicroVAX 3100 Model 96: Cheetah++, KA56 NVAX CPU
;MicroVAX 3100 Model 98: Cheetah++, KA59 NVAX CPU
;InfoServer 100/150/1000: General purpose storage server (disk, CD-ROM, tape and MOP boot server) related to MicroVAX 3100 Model 10, running custom firmware, KA41-C CPU

;MicroVAX 3300/3400: Mayfair, used KA640 CPU card

;MicroVAX 3500/3600: Mayfair-II, used KA650 CPU card, September 1987

;MicroVAX 3800/3900: Mayfair-III, used KA655 CPU cardVAXstation series

;VAXstation II: MicroVAX II workstation configuration
;VAXstation II/GPX: Caylith, hardware-enhanced, high-performance color graphics, December 1985

;VAXstation 2000: VAXstar MicroVAX 2000 workstation configuration

;VAXstation 3100 series
;VAXstation 3100 Model 30: PVAX, KA42-A CVAX CPU
;VAXstation 3100 Model 38: PVAX rev#7, KA42-B CVAX CPU
;VAXstation 3100 Model 40: Model 30 in larger enclosure
;VAXstation 3100 Model 48: Model 38 in larger enclosure
;VAXstation 3100 Model 76: RigelMAX, KA43-A Rigel CPU
;VT1300: X terminal (essentially a diskless VAXstation 3100 Model 30)

;VAXstation 3200/3500: Mayfair/GPX, KA650 CVAX CPU

;VAXstation 3520/3540: Firefox, two or four KA60 CVAX processors

;VAXstation 4000: TURBOchannel bus
;VAXstation 4000/VLC aka Model 30: PVAX2/VLC, KA48 SOC ("System On Chip") CPU, slim pizza box, accepting standard 72-pin parity SIMM modules
;VAXstation 4000 Model 60: PMariah, KA46 Mariah CPU, 18 ns cycle time (approximately 55.56 MHz)
;VAXstation 4000 Model 90: Cougar, KA49-A NVAX CPU
;VAXstation 4000 Model 90A: Cougar+, KA49-A NVAX CPU
;VAXstation 4000 Model 96: Cougar++, KA49-C NVAX CPU
;VXT 2000: X terminal based on SOC CPU

;VAXstation 8000: Lynx, very rare high-end 3D workstation based on VAX 8200VAX 4000 series: MicroVAX name dropped
;VAX 4000 Model 50: VAXbrick, KA600 NVAX processor, CPU upgrade for MicroVAX 3x00 or VAX 4000-200
;VAX 4000 Model 100/100A: Cheetah-Q, KA52 NVAX processor
;VAX 4000 Model 105A: Cheetah-Q+, faster KA53 NVAX processor
;VAX 4000 Model 106A/108: Cheetah-Q++, faster KA54/KA57 NVAX processor
;VAX 4000 Model 200: Spitfire, KA660 SOC processor
;VAX 4000 Model 300: Pele, KA670 Rigel 1.5 µm CMOS processor chipset, mid-1989
;VAX 4000 Model 400: Omega, KA675 NVAX processor
;VAX 4000 Model 500/500A: Omega/N, KA680/KA681 NVAX processor
;VAX 4000 Model 505A/600/600A: Omega/N+, KA690/KA691 NVAX processor
;VAX 4000 Model 700A: Legacy, KA692 NVAX processor
;VAX 4000 Model 705A: Legacy+, KA694 NVAX processorVAX 8200/8300: Scorpio, one or two V-11 CPUs respectively, VAXBI backplane, January 1986
;VAX 8250/8350: Faster ScorpiosVAX 6000 series : x = number of processors, max 6 for the 600 series
;VAX 6000 Model 2x0 aka VAX 62x0 series: Calypso,: used CVAX chipset, April 1988
;VAX 6000 Model 3x0 aka VAX 63x0 series: Hyperion, CVAX+ 1.5 µm CMOS processor chipset, January 1989
;VAX 6000 Model 4x0 aka VAX 64x0 series: Calypso/XRP, Rigel 1.5 µm CMOS chipset, mid-1989
;VAX 6000 Model 5x0 aka VAX 65x0 series: Calypso/XMP, Mariah 1.0 µm CMOS chipset, October 1990
;VAX 6000 Model 6x0 aka VAX 66x0 series: Neptune, NVAX 0.75 µm CMOS chipset, November 1991

;VAX 6333: prepackaged cluster of VAX 6000 Model 300 seriesVAX 7000 series:
;VAX 7000 Model 6x0: Laser/Neon, Up to six KA7AA NVAX+ processors, field-upgradable to Alpha AXP 64-bit processor(s) (ie. DEC 7000 AXP configuration), July 1992
;VAX 7000 Model 7x0: Laser/Krypton, KA7AB NVAX5 processor(s)
;VAX 7000 Model 8x0: Laser/Krypton+, faster KA7AC NVAX5 processor(s)VAX 10000 Model 6x0: Blazer/Neon, VAX 7000 Model 6x0 with more I/O capacity and UPS as standardVAXft fault-tolerant series:
;VAXft 3000 Model 310: Cirrus, CVAX+ CPUs, two-processor, lock-stepped fault tolerant system, February 1990
;VAXft Model 110: slower, lower cost Cirrus
;VAXft Model 410/610/612: Cirrus II, SOC CPUs
;VAXft Model 810: Jetstream, NVAX+ CPUs

Miscellaneous

VAXstation 100 (VS100): Graphics terminal based on a MC68000 microprocessor, intended to connect to a VAX system via Unibus, May 1983.VAXstation 500: Color successor to VAXstation 100, October 1985.

Clones

A number of clones of VAX models, both authorized and unauthorized, were produced. Examples include:

  • Systime Ltd. of the United Kingdom produced clones of early VAX models such as the Systime 8750 (equivalent to the VAX 11/750).
  • Norden Systems produced the ruggedized, Military-specification MIL VAX series.
  • The Hungarian Central Research Institute for Physics (KFKI) produced a series of clones of early VAX models, the TPA-11/540, 560 and 580.

References

External links

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