block diagram compiler

A Block diagram Language

A Block diagram Language (ABL) is the graphic companion language of the textual hardware description language KARL, which supports Structured hardware design. It has been authored by Reiner Hartenstein and jointly implemented by the Xputer Lab at TU Kaiserslautern and Guglielmo Girardi at CSELT, Torino,Italy, as the ABLED interactive graphic hardware design editor with automatic interconnect compatibility check. The Domino notation of ABL is based on structured wiring function primitives and topological notations of KARL and allows interactive interconnect synthesis by module block abutment. A couple of other design tools are based on these calculus-like notations, like ARIANNA (interactive chip floor plan generator, and GENMON from CSELT), the BACH compiler, an ASIC Data path module generator, and others.


  • G. Girardi, R. Hartenstein, U. Welters: ABLED: a RT level Schematic Editor and Simulator user Interface; Int`l EUROMICRO Symp.; Brussels, Belgium, 1985.
  • G. Girardi, R. Hartenstein, U. Welters: KARL (textual) and ABL (graphic) : A User/Designer interface in microelectronics; in (Editor: J. Encarnaçao): CAD-Schnittstellen und Datentransfer-Formate im Elektronik-Bereich; Springer-Verlag, 1986.
  • A. Bonomo, G. Girardi, A. Lecce, L. Maggiulli: GENMON: a specialized ABL editor for design methodology descriptions; 2nd ABAKUS workshop, Igls, Austria, 1988.
  • A. Bonomo, M. Italiano, L. Lavagno, L. Maggiuli, M. Melgara, M. Paolini, I. Stamelos: BACH (Behavioural-Level Automated Compilation of Hardware): An Integrated ASIC Synthesis System; ESPRIT Technical Week, Brussels, Belgium 1988
  • V. G. Moshnyaga, H. Onodera, K. Tamaru, H. Yasuura: A Language for Designing Data-Path Module Generators; Int’l Design Workshop "Russian Workshop’92", Moscow, Russia, 1992
  • V. G. Moshnyaga, H. Yasuura: A Language for Designing Module Generators; Proc. SASIMI’92 - Synthesis and Simulation Meeting and Int’l Exchange, Kobe, Japan, Apr. 1992
  • M. Ayala-Rincon et al.: Modeling and prototyping dynamically reconfigurable systems for efficient computation of dynamic programming methods by rewriting-logic; Proceedings of the 17th symposium on Integrated circuits and system design 2004, Pernambuco, Brazil, September 07 - 11, 2004
  • R. Hartenstein: Fundamentals of Structured Hardware Design - A Design Language Approach at Register Transfer Level; North Holland/American Elsevier Amsterdam/New York 1977
  • R. Hartenstein: The History of KARL and ABL; in: J. Mermet (editor): Fundamentals and Standards in Hardware Description Languages; Kluwer Academic Publishers, September 1993


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