was the name given to a series of supercomputers
built at the University of Illinois at Urbana-Champaign
. In all 5 computers were built in this series between 1951 and 1974. Design of the ILLIAC VI began in early 2005.
was the first of two computers built under contract at the University of Illinois. ORDVAC was completed the spring of 1951 and checked out in the summer. In the fall it was delivered to US Army Aberdeen Proving Grounds and was checked out in roughly one week. As part of the contract, funds were provided to the University of Illinois to build a second identical computer known as ILLIAC I. (See IAS machine
was the first von Neumann architecture
computer to be built and owned by an American university. It was put into service on September 22
. The computer was based upon plans published by von Neumann
, and Mauchly
at Princeton, but the Princeton computer was completed exceedingly late. Using the von Neumann architecture
from Institute for Advanced Study (IAS)
, it was built with 2,800 vacuum tubes and weighed about 5 tons. ILLIAC I had a 5k main memory and 64k Drum memory. By 1956 it had gained more computing power than all computers in Bell Labs
combined. ILLIAC I was decommissioned in 1963 when ILLIAC II (see below) became operational. A programming manual can be found at
(See IAS machine) (See also ENIAC)
The ILLIAC II
was the first transistorized and pipelined super computer built by the University of Illinois. At its inception in 1958 it was 100 times faster than competing machines of that day. It became operational in 1962, two years later than expected.
ILLIAC II had 8192 words of core memory, backed up by 65,536 words of storage on magnetic drums. The core memory access time was 1.8 to 2 µs. The magnetic drum access time was 7 µs. A "fast buffer" was also provided for storage of short loops and intermediate results (similar in concept to what is now called cache). The "fast buffer" access time was 0.25 µs.
The word size was 52 bits. Floating point numbers used a format with 7 bits of exponent (power of 4) and 45 bits the mantissa. Instructions were either 26 bits or 13 bits long, allowing packing of up to 4 instructions per memory word.
In 1963 Donald B. Gillies used the ILLIAC II to find three Mersenne primes, with 2917, 2993, and 3376 digits - the largest primes known at the time.
The ILLIAC III
was a fine-grained SIMD
pattern recognition computer built by the University of Illinois in 1966.
This ILLIAC's initial task was image processing of bubble chamber experiments used to detect nuclear particles. Later it was used on biological images. The machine was destroyed in a fire, caused by a Variac shorting on one of the wooden-top benches, in 1968.
The ILLIAC IV
was one of the most infamous supercomputers
ever, one of the first attempts at a massively parallel computer. Key to the ILLIAC IV design was fairly high parallelism
with up to 256 processors, used to allow the machine to work on large data sets in what would later be known as vector processing
. The machine was finally ready for operation in 1976, after a decade of development that was now massively late, massively over budget, and outperformed by existing commercial machines like the Cray-1
is a hierarchical shared-memory supercomputer completed in 1988. The development team was led by Professor David Kuck
. This SMP (symmetric multiprocessing) system embodied advances in interconnection networks, control unit support of parallelism, optimizing compilers and parallel algorithms and applications. It is occasionally referred to as ILLIAC V.
The ILLIAC VI
is currently under construction at the University of Illinois Urbana-Champaign. It is a 65K node communications supercomputer utilizing commodity DSPs as the computation nodes. It will be a fixed point workhorse capable of over 1.2 quadrillion multiply-accumulate operations per second and will have a bi-sectional bandwidth of over 4 terabytes per second.
The Trusted ILLIAC
was completed in 2006 at the University of Illinois Urbana-Champaign
's Coordinated Science Laboratory
and Information Trust Institute
. It is a
256 node Linux cluster, with each node having two processors and onboard FPGA's to enable smart compilers and programming models, system assessment
and validation, configurable trust mechanisms, automated fault management, on-line adaptation, and numerous other configurable trust frameworks. The
nodes each have access to 8 GB memory on a 6.4 GB/s bus, and are connected via 8 GB/s PCI-Express to the FPGAs. A 2.5 GB/s InfiniBand network provides the internode connectivity. The system itself was constructed using the help and support of AMD