Pentium Pro

Pentium Pro

The Pentium Pro is a sixth-generation x86-based microprocessor developed and manufactured by Intel introduced in November 1995. It introduced the (P6 microarchitecture) and was originally intended to replace the original Pentium in a full range of applications. While the Pentium and Pentium MMX had 3.1 and 4.5 million transistors, respectively, the Pentium Pro contained 5.5 million transistors. Later, it was reduced to a more narrow role as a server and high-end desktop chip. The Pentium Pro was capable of both dual- and quad-processor configurations. It only came in one form factor, the relatively large rectangular Socket 8.

In 1997, the Pentium Pro was succeeded by the Pentium II processor, which was essentially a cost-reduced and re-branded Pentium Pro with the addition of MMX and enhanced 16-bit code performance. Costs were reduced by using standard SRAM cache chips running at half-speed, which increased production yields. The next year, in 1998, Intel split the market into three segments: budget workstations and home users, higher-end workstations and power users, and multi-processor capable servers. Those segments were served by the Celeron, the Pentium II, and the Pentium II Xeon, respectively.

The Pentium Pro (given the Intel product code 80521), was the first generation of the P6 architecture, which would carry Intel well into the next decade. The design would scale from its initial 150 MHz start, all the way up to 1.4 GHz with the "Tualatin" Pentium III. The Pentium Pro had a theoretical performance of 200 MFLOPS. The core's various traits would continue after that in the derivative core called "Banias" in Pentium M and Intel Core (Yonah), which itself would evolve into Core architecture (Core 2 processor) in 2006 and onward.

Microarchitecture and performance

Belying its name, the Pentium Pro had a completely new microarchitecture, a departure from the Pentium rather than an extension of it. The Pentium Pro (P6) featured many advanced concepts not found in the Pentium, although it wasn't the first or only x86 processor that did (see NexGen Nx586 or Cyrix 6x86). The Pentium Pro pipeline employed extra decoding steps to dynamically translate IA-32 instructions into buffered micro-operation sequences which could then be analysed, reordered, and renamed in order to detect parallelizable operations that may feed more than one execution unit at once. The Pentium Pro thus featured out of order execution, including speculative execution via register renaming. It also had a wider 36-bit address bus (usable by PAE).

Performance with 32-bit code was excellent and well ahead of the older Pentium at the time, by 25-35%; however, the Pentium Pro's 16-bit performance was approximately only 20% faster than a Pentium at running 16-bit code due to the fact that register renaming was done on full 32-bit registers only (this was fixed in the Pentium-II).

It was this, along with the Pentium Pro's high price, that caused the rather lackluster reception among PC enthusiasts, given the dominance at the time of the 16-bit MS-DOS, 16/32-bit Windows 3.1x, and 32/16-bit Windows 95 (parts of Windows 95, such as USER.exe, were still mostly 16-bit). To gain the full advantages of Pentium Pro's microarchitecture, one needed to run a fully 32-bit OS such as Windows NT 3.51, Unix, Linux or OS/2.

After the microprocessor was released a bug was discovered in the floating point unit, commonly called the "Pentium Pro and Pentium II FPU bug" and by Intel as the "flag erratum". The bug occurs under some circumstances during floating-point to integer conversion when the floating-point number won't fit into the smaller integer format causing the FPU to deviate from its documented behaviour. The bug is considered to be minor and occurs under such special circumstances that very few, if any, software programs are affected.

An innovation in cache

Likely Pentium Pro's most noticeable addition was its on-package L2 cache, which ranged from 256 KB at introduction to 1 MB in 1997. At the time, manufacturing technology did not feasibly allow a large L2 cache to be integrated into the processor core. Intel instead placed the L2 die(s) separately in the package which still allowed it to run at the same clock speed as the CPU core. Additionally, unlike most motherboard-based cache schemes that shared the main system bus with the CPU, the Pentium Pro's cache had its own backside bus (called dual independent bus by Intel). Because of this, the CPU could read main memory and cache concurrently, greatly reducing a traditional bottleneck. The cache was also "non-blocking", meaning that the processor could issue more than one cache request at a time (up to 4), reducing cache-miss penalties. (This is an example of MLP, Memory Level Parallelism.) These properties combined to produce an L2 cache that was immensely faster than the motherboard-based caches of older processors. This cache alone gave the CPU an advantage in input/output performance over older x86 CPUs. In multiprocessor configurations, Pentium Pro's integrated cache skyrocketed performance in comparison to architectures which had each CPU sharing a central cache.

However, this far faster L2 cache did come with some complications. The Pentium Pro's "on-package cache" arrangement was unique. The processor and the cache were on separate dies in the same package and connected closely by a full-speed bus. The two or three dies had to be bonded together early in the production process, before testing was possible. This meant that a single, tiny flaw in either die made it necessary to discard the entire assembly, which was one of the reasons for the Pentium Pro's relatively low production yield and high cost. All versions of the chip were expensive, those with 1024 KB being particularly so, since it required two 512 KB cache dies as well as the processor die.

Available models

Pentium Pro clock speeds were 150, 166, 180 or 200 MHz with a 60 or 66 MHz external bus clock. Some users chose to overclock their Pentium Pro chips, with the 200 MHz version often being run at 233 MHz, and the 150 MHz version often being run at 166 MHz. The chip was popular in symmetric multiprocessing configurations, with dual and quad SMP server and workstation setups being commonplace.

In Intel's "Family/Model/Stepping" scheme, the Pentium Pro is family 6, model 1, and its Intel Product code is 80521.

Evolution in fabrication

As time progressed, the process used to fabricate the Pentium Pro changed, leading to a combination of processes used in the same package:

  • The 150 MHz Pentium Pro processor die was fabricated in a 0.50 μm BiCMOS process.
  • The 166, 180, and 200 MHz Pentium Pro processor die was fabricated in a 0.35 μm BiCMOS process.
  • The 256 KB L2 cache die was fabricated in a 0.50 μm BiCMOS process.
  • The 512 and 1024 KB L2 cache die was fabricated 0.35 μm BiCMOS process.

Upgrade paths

In 1998, the 300/333 MHz Pentium II Overdrive processor for Socket 8 was released. Featuring 512 KB of full-speed cache, it was produced by Intel as a drop-in upgrade option for owners of Pentium Pro systems (the BIOS of the motherboard sometimes had to be updated). However, it was officially supported by Intel only in single or dual-processor mode, not 4-way or higher, which did not make it a usable upgrade for high end quad-processor systems.

As Slot 1 motherboards became prevalent, several manufacturers released slockets, such as the Tyan M2020, Asus C-P6S1, Tekram P6SL1 and the Abit KP6, to allow Pentium Pro processors to be used in them. The Intel 440FX chipset explicitly supports both Pentium Pro and Pentium II processors so using a slocket with them is straightforward. However, since the Intel 440BX and later Slot 1 chipsets do not explicitly support the Pentium Pro, the only Socket 8 processor that will usually work with a slocket in such a motherboard is the Pentium II Overdrive, since it is in essence a Pentium II processor.

Core specifications

Pentium Pro

  • L1 cache: 8 + 8 KB (Data + Instructions)
  • L2 cache: 256, 512 KB (one die) or 1024 KB (two 512 KB dies) in a multi-chip module clocked at CPU-speed
  • Socket: Socket 8
  • Front side bus: 60 and 66 MHz
  • VCore: 3.1-3.3 V
  • Fabrication: 0.50 µm or 0.35 BiCMOS
  • First release: November 1995
  • Clockrate: 150, 166, 180, 200 MHz

Pentium II Overdrive

  • L1 cache: 16 + 16 KB (Data + Instructions)
  • L2 cache: 512 KB external chip on CPU module running at 100% of CPU speed
  • Socket: Socket 8
  • Multiplier: Locked at 5x
  • Front side bus: 60 and 66 MHz
  • VCore: 3.1-3.3 V (Has on-board voltage regulator)
  • Fabrication: 0.25 µm
  • Based on the Deschutes-generation Pentium II
  • First release: 1997
  • Supports MMX technology

Pentium Pro / 6th generation competitors


See also

External links

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