The 68020 (usually just referred to as the '020, pronounced oh-two-oh or oh-twenty) had 32-bit internal and external data and address buses. A lower cost version, the 68EC020, only had a 24-bit address bus. The 68020 was produced at speeds ranging from 12 MHz to 33 MHz.
The 68020 added many improvements to the 68010 including a 32-bit arithmetic logic unit (ALU), external data bus and address bus, and new instructions and addressing modes. The 68020 (and 68030) had a proper three-stage pipeline. Though 68010 had a loop mode, it was little used and 68020 replaced this with a proper instruction cache of 256 bytes, the first 68k series processor to feature onboard cache memory.
The alignment restriction on word and longword data access present in its predecessors was removed with the 68020.
The new instructions included some minor improvements and extensions to the supervisor state, several instructions for software management of a multiprocessing system (which were removed in the 68060), some support for high-level languages which did not get used much (and was removed from future 680x0 processors), bigger multiply (32×32→64 bits) and divide (64÷32→32 bits quotient and 32 bits remainder) instructions, and bit field manipulations.
The new addressing modes added scaled indexing and another level of indirection to many of the pre-existing modes, and added quite a bit of flexibility to various indexing modes and operations. Though it was not intended, these new modes made the 68020 very suitable for page printing; most laser printers in the early '90s had a 68EC020 at their core.
The 68020 had a minimal 256 byte direct-mapped instruction cache, arranged as 64 four-byte entries. Although small, it still made a significant difference in the performance of many applications. The resulting decrease in bus traffic was particularly important in systems relying heavily on DMA.
It is also the processor used on board TGV trains to decode signalling information which is sent to the trains through the rails. It is further being used in the flight control systems of the Eurofighter Typhoon combat aircraft.
For more information on the instructions and architecture see Motorola 68000.
The 68EC020 is a microprocessor from Motorola. It is a lower cost version of the Motorola 68020, the difference between the two being that the 68EC020 only has a 24-bit address bus, rather than the 32-bit address bus of the full 68020, and thus is only able to address 16 MB of RAM.
Real-time operating system and tools run on a variety of RISC and CISC microprocessors. (OS-9000 runs on reduced-instruction-set computer and complex-instruction-set computer architectures)
Oct 12, 1989; Real-time operating system and tools run on a variety of RISC and CISC [microPs] A modular scalable real-time operating system...