A Hardware Verification Language
, or HVL
, is a programming language used to verify the designs of electronic circuits
written in a hardware description language
. HVLs typically include features of a high-level programming language
as well as features for easy bit-level manipulation similar to those found in HDLs
OpenVera, Specman e, and SystemC are the most commonly used HVLs, while SystemVerilog attempts to combine HDL and HVL constructs into a single standard.