It also included a number of channel controllers for handling I/O. The CPU could hand off short programs written in the channel controller's own machine language, which would then process the data, move it to or from the memory, and raise an interrupt when they completed. This allowed the main CPU to move on to other tasks while waiting for the slow I/O to complete, a primary feature of time sharing systems.
The GE-635 was used for the Dartmouth Time Sharing System starting in 1965.
The Multics operating system was begun in 1964 as an advanced new operating system for the 600 series, though it was not production-ready until 1969. GE was hardware supplier to the project and one of development partners (the others were Massachusetts Institute of Technology and Bell Labs). GE saw this project as an opportunity to clearly separate themselves from other vendors by offering this advanced OS which would run best only on their machines. Multics required a number of additional features in the CPU to be truly effective, and John Couleur was joined by Edward Glaser at MIT to make the required modifications. The result was the GE-645, which included a number of security levels in the CPU, and instructions for handling virtual memory. Addressing was modified to use an 18-bit segment in addition to the 18-bit address, dramatically increasing the theoretical memory size and making virtual memory much easier to support.
GE originally hadn't intended on entering the commercial computer market with the machine. However by the early 1960s GE was the largest user of IBM mainframes, and producing their own machines seemed like an excellent way to lower the costs of their computing department. In one estimate the cost of development would be paid for in a single year of IBM rental fees. Many remained skeptical, but after a year of internal wrangling, the project to commercialize the M236 eventually got the go-ahead in February 1963.
The machine was originally offered as the main GE-635, and the slower but compatible GE-625 and GE-615. While most were single processor systems, the 635 could be configured with four CPUs (although I know of only one sysem with more than two) and up to 4 Input/Output Controllers (IOC's) each with up to 16 Common Peripheral Interface Channels.
The 635 was likely the first example of a general purpose SMP system (although the GECOS/GCOS software treated the processors as a master, and up to 3 slaves). The 600 line consisted of 6 models, 605, 615,625,635,645 and 655.
The 615 is a 635 with Control Unit (CU) and Operations Unit (OU) overlap disabled, and a 36 bit wide memory path. The 625, a 635 with Control Unit and Operations Unit overlap disabled and 72 bit wide memory path, and the 635 with 72 bit wide memory path and CU/OU overlap enabled. The difference between these models was less than 10 wires on the backplane. Field service could convert a 615 to a 635 or 625 or vice versa in a couple of hours if necessary. Other than those few wires, the 615,625 and 635 are identical. The 605 was used in some realtime/military applications, and was essentially a 615 without the floating point hardware. Programs coded for a 605 would run without any modification on any other 600 line processor
The 645 is a modified 635 processor that provided hardware support for the Multics Operating System developed at MIT. The 605/615/625/635 and 645 were essentially 2nd Generation Computers (discrete transitor/TTL logic) with a handful of Integrated Circuits. Memory was 2 microsecond ferrite core, (which could be interleaved). GE bought core memory from Fabri-Tek, Ampex and Lockheed. The Lockheed memory tended to be the most reliable.
The last model, the 655 was announced, but probably never delivered as a 655.
However continuing problems with the reliability of the magnetic tape systems used with the system cast a pall over the entire project. In 1966 GE froze many orders while others were cancelled outright. By 1967 these problems were cleared up, and the machines were re-launched along with an upgraded version of the GECOS operating system.
A follow-on project to create a next-generation 635 started in 1967. The new GE-655 replaced the individual transistors from the earlier models with integrated circuits, which doubled the performance of the machine while also greatly reducing assembly costs. However the machine was still in development in 1969, by which time the Multics project had finally produced an operating system usable by end-users. Besides MIT, Bell Labs, and GE, GE-645 systems running Multics were installed at the US Air Force Rome Development Center, Honeywell Billerica, and Machines Bull in Paris. These last two systems were used as a "software factory" by a Honeywell/Bull project to design the Honeywell Level 64 computer.
GE sold its computer division to Honeywell in 1970, who renamed the GE-600 series as the Honeywell 6000 series. The 655 was officially released in 1973 as the Honeywell 6070(with reduced performance versions, the 6030 and 6050). An optional Decimal/Business instruction set was added to improve COBOL performance. (Extended Instruction Set, aka EIS and the Decimal Unit or DU). The machines with EIS were the 'even' series, the 6040, 6060, 6080 and later the 6025. Several hundred of these processors were sold. Memory was initially 600ns Ferrite core made by Lockheed. Later versions used 750ns MOS memory. The two could co-exist within a system, but not within a memory controller.
A version of the 6080 with the various Multics-related changes similar to the 645 was released as the 6180. A few dozen 6180-architecture CPUs were shipped. Later members of the 6000 series were released under various names, including Level 66, Level 68, DPS-8, DPS-88, DPS-90, DPS-9000 by Honeywell, Groupe Bull, and NEC.