The earlier Cray-3 was the first major application of gallium arsenide (GaAs) semiconductors in computing. The project was not considered a success, and only one Cray-3 was delivered, a prototype that was never paid for. Seymour Cray moved on to the Cray-4 design, announcing the design in 1994.
The Cray-4 was essentially a shrunk and sped-up version of the Cray-3, and it consisted of a number of vector processors attached to a fast memory. The Cray-3 supported from four to sixteen processors running at 474 MHz, while the Cray-4 scaled from four to sixty-four processors running at 1 GHz. The final packaging for the Cray-4 was intended to fit into 1 cubic foot, and was to be tested in the smaller one-CPU "tanks" from the Cray-3. A "midrange" system included 16 processors, 1,024 megawords (8192 MB) of memory and provided 32 gigaflops for $11 million.
The local memory architecture used on the Cray-2 and Cray-3 was dropped, returning to the mass of B- and T- registers on earlier designs, owing to Seymour's lack of success using the local memory effectively. Parts of CPU prototypes exist. Marketing brochures also exist.