A control store is usually implemented as a diode-array of read-only memory. This tradition dates back to the program timing matrix on the MIT Whirlwind, first described in 1947. Modern VLSI CPUs also use a diode matrix for the read-only control store. The original System/360 models of IBM mainframe had read-only control store, but later System/370 and successor models loaded their microprograms from floppy disks into a writeable control store consisting of ultra-high speed random-access read-write memory. This permitted IBM to easily repair microprogramming defects in the field. Even when the majority of the control store is stored in ROM of some sort, computer vendors often sell writeable control store as an option, allowing the customers to customize the machine's microprogram.
The control store usually has on its outputs a register. It must be obvious that the outputs that go back into the sequencer to determine the next address have to go through some sort of register to prevent a race condition being created. However, it turns out that in most designs it pays for all of the other bits to also go through a register. This is because the machine will work faster if the execution of the next microinstruction is delayed by one cycle. This register is known as a pipeline register. The point is that very often the execution of the next microinstruction is dependent on result of the current microinstruction that will not be stable until the end of the current microcycle. It can be seen that either way, all of the outputs of the control store go into one big register. Historically it used to be possible to buy EPROMs with these register bits on the same chip.
The clock signal determining the cycle time of the system primarily clocks this register.