Binary decision diagram

Binary decision diagram

A binary decision diagram (BDD), like a negation normal form (NNF) or a propositional directed acyclic graph (PDAG), is a data structure that is used to represent a Boolean function. A Boolean function can be represented as a rooted, directed, acyclic graph, which consists of decision nodes and two terminal nodes called 0-terminal and 1-terminal. Each decision node is labeled by a Boolean variable and has two child nodes called low child and high child. The edge from a node to a low (high) child represents an assignment of the variable to 0 (1). Such a BDD is called 'ordered' if different variables appear in the same order on all paths from the root. It is called 'reduced' if the graph is reduced according to two rules:

In popular usage, the term BDD almost always refers to Reduced Ordered Binary Decision Diagram (ROBDD in the literature, used when the ordering and reduction aspects need to be emphasized). The advantage of an ROBDD is that it is canonical (unique) for a particular functionality. This property makes it useful in functional equivalence checking and other operations like functional technology mapping.

A path from the root node to the 1-terminal represents a (possibly partial) variable assignment for which the represented Boolean function is true. As the path descends to a low child (high child) from a node, then that node's variable is assigned to 0 (1).

BDDs are extensively used in CAD software to synthesize circuits (logic synthesis) and in formal verification. There are several lesser known applications of BDD, including Fault tree analysis, Bayesian Reasoning and Product Configuration.

Every arbitrary BDD (even if it is not reduced or ordered) can be directly implemented by replacing each node with a 2 to 1 multiplexer; each multiplexer can be directly implemented by a 4-LUT in a FPGA. Unfortunately, it is not so simple to convert from an arbitrary network of logic gates to a BDD (unlike the and-inverter graph).


The left figure below shows a binary decision tree (the reduction rules are not applied), and a truth table, each representing the function f (x1, x2, x3). In the tree on the left, the value of the function can be determined for a given variable assignment by following a path down the graph to a terminal. In the figures below, dotted lines represent edges to a low child, while solid lines represent edges to a high child. Therefore, to find (x1=0, x2=1, x3=1), begin at x1, traverse down the dotted line to x2 (since x1 has an assignment to 0), then down two solid lines (since x2 and x3 each have an assignment to one). This leads to the terminal 1, which is the value of f (x1=0, x2=1, x3=1).

The binary decision tree of the left figure can be transformed into a binary decision diagram by maximally reducing it according to the two reduction rules. The resulting BDD is shown in the right figure.


The basic idea from which the data structure was created is the Shannon expansion. A switching function is split into two sub-functions (cofactors) by assigning one variable (cf. if-then-else normal form). If such a sub-function is considered as sub-tree, it can be represented by a binary decision tree. Binary decision diagrams (BDD) were introduced by Lee, and further studied and made known by Akers and Boute.

The full potential for efficient algorithms based on the data structure was investigated by Randal Bryant at Carnegie Mellon University: his key extensions were to use a fixed variable ordering (for canonical representation) and shared sub-graphs (for compression). Applying these two concepts results in an efficient data structure and algorithms for the representation of sets and relations). By extending the sharing to several BDDs, i.e. one sub-graph is used by several BDDs, the data structure Shared Reduced Ordered Binary Decision Diagram is defined. The notion of a BDD is now generally used to refer to that particular data structure.

On a more abstract level, BDDs can be considered as a compressed representation of sets or relations. Unlike other compressed representations, the actual operations are performed directly on that compressed representation, i.e. without decompression.

Variable ordering

The size of the BDD is determined both by the function being represented and the chosen ordering of the variables. For a boolean function f(x_1,ldots, x_{n}) then depending upon the ordering of the variables we would end up getting a graph whose number of nodes would be linear (in n) at the best and exponential at the worst case. Let us consider the Boolean function f(x_1,ldots, x_{2n}) = x_1x_2 + x_3x_4 + dots + x_{2n-1}x_{2n}. Using the variable ordering x_1 < x_3 < dots < x_{2n-1} < x_2 < x_4 < dots < x_{2n}, the BDD needs 2^{n+1}, nodes to represent the function. Using the ordering x_1 < x_2 < x_3 < x_4 < dots < x_{2n-1} < x_{2n}, the BDD consists of 2n nodes.

It is of crucial importance to care about variable ordering when applying this data structure in practice. The problem of finding the best variable ordering is NP-hard. For any constant c>1 it is even NP-hard to compute a variable ordering resulting in an OBDD with a size that is at most c times larger than an optimal one. However there exist efficient heuristics to tackle the problem.

There are functions for which the graph size is always exponential — independent of variable ordering. This holds e. g. for the multiplication function (an indication as to the apparent complexity of factorization ). Researchers have of late suggested refinements on the BDD data structure giving way to a number of related graphs: BMD (Binary Moment Diagrams), ZDD (Zero Suppressed Decision Diagram), FDD (Free Binary Decision Diagrams), PDD (Parity decision Diagrams), etc.

Logical operations on BDDs

Many logical operations on BDDs can be implemented by polynomial-time graph manipulation algorithms.

See also


This is a crude way to build a BDD in C like language. Declare the data structure as follows and then proceed accordingly.

/* The basic data structure */
struct vertex
   char *φ;
   struct vertex *hi, *lo;
/* The interface to the Unique Table */
struct vertex *old_or_new(char *φ, struct vertex *hi, *lo)
   if(“a vertex  v = (φ, hi, lo) exists”)
       return  v;
   else {
       v <- “new vertex pointing at (φ, hi, lo);
       return  v;

Data Structure for Building the ROBDD

struct vertex *robdd_build(struct expr f, int i)
   struct vertex *hi, *lo;
   struct char *φ;
   if(equal(f, '0'))
      return v0;
   else if (equal(f, '1'))
      return v1;
   else {
      φ ← п(i);
      hi ← robdd_build(f (xi = 1), i+1);
      lo ← robdd_build(f (xi = 0), i+1);

      if(lo == hi)
         return lo;
         return old_or_new(φ, hi, lo);

Available Packages

  • ABCD: The ABCD package by Armin Biere, Johannes Kepler Universität, Linz.
  • BuDDy: A BDD package by Jørn Lind-Nielsen
  • CMU BDD, BDD package, Carnegie Mellon University, Pittsburgh
  • CrocoPat, BDD package and a high-level querying language, Ecole Polytechnique Fédérale de Lausanne (EPFL), Switzerland
  • CUDD: BDD package, University of Colorado, Boulder
  • JavaBDD, a Java port of BuDDy that also interfaces to CUDD, CAL, and JDD
  • The Berkeley CAL package which does breadth-first manipulation
  • TUD BDD: A BDD package and a world-level package by Stefan Höreth
  • Vahidi's JDD, a java library that supports common BDD and ZBDD operations
  • Vahidi's JBDD, a Java interface to BuDDy and CUDD packages
  • Maiki & Boaz BDD-PROJECT, a web application for BDD reduction and visualization
  • A. Costa BFunc, includes a BDD boolean logic simplifier supporting up to 32 inputs / 32 outputs (independently)
  • DDD: A C++ library with support for integer valued and hierarchical decision diagrams.
  • JINC: A C++ library developed at University of Bonn, Germany, supporting several BDD variants.
  • Configit Product Modeler: A BDD-based tool for product configuration developed by Configit, Copenhagen.


  • Ch. Meinel, T. Theobald, " Algorithms and Data Structures in VLSI-Design: OBDD - Foundations and Applications", Springer-Verlag, Berlin, Heidelberg, New York, 1998.
  • R. Ubar, "Test Generation for Digital Circuits Using Alternative Graphs (in Russian)", in Proc. Tallinn Technical University, 1976, No.409, Tallinn Technical University, Tallinn, Estonia, pp.75–81.
  • Item Toolkit Fault Tree Module includes BDD Analysis Engine

External links

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