The part was originally made by National Semiconductor. Similarly-numbered devices, with varying levels of compatibility with the original National Semiconductor part, are made by other manufacturers. A UART function that is register-compatible with the 16550 is usually a feature of multifunction I/O cards for IBM PC-compatible computers, and may be integrated on the motherboard of other compatible computers.
Replacement of the factory-installed 8250 UART was a common upgrade for owners of IBM PC, XT, and compatible computers when high-speed modems became available. At speeds higher than 9600 baud, owners discovered that the serial ports of the computers were not able to handle a continuous flow of data without losing characters. Exchange of the 8250 (having only a one-byte received data buffer) with a 16550, and occasionally patching or setting system software to be aware of the FIFO feature of the new chip, improved the reliability and stability of high-speed connections.
Main features of the 16550 include:
Both the hardware and software interface of the 16550 are backward compatible with the earlier 8250 series and 16450 UART. The current version (since 1995) by National Semiconductor is called the 16550D.
One drawback of the earlier 8250 series and 16450 UARTs was that interrupts were generated for each byte received. This generated high rates of interrupts as transfer speeds increased. More critically, with only a 1-byte buffer there is a genuine risk that a received byte will be overwritten if interrupt service delays occur. To overcome these shortcomings, the 16550 series UARTs incorporated a 16-byte FIFO with a programmable interrupt trigger of 1, 4, 8, or 14 bytes.
Unfortunately, the original 16550 had a bug that prevented this FIFO from being used. National Semiconductor later released the 16550A which corrected this issue. Not all manufacturers adopted this nomenclature, however, continuing to refer to the fixed chip as a 16550.
The 16550 also incorporates a transmit FIFO, though this feature is less critical as delays in interrupt service would only result in sub-optimum transmission speeds and not actual data loss.